Alberto García Ortiz

2008
23	EE	Alberto García Ortiz, Leandro Soares Indrusiak, Tudor Murgan, Manfred Glesner: PMD: A Low-Power Code for Networks-on-Chip Based on Virtual Channels. PATMOS 2008: 219-228
2007
22	EE	José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Inserting Data Encoding Techniques into NoC-Based Systems. ISVLSI 2007: 299-304
21	EE	Tudor Murgan, Petru Bogdan Bacinschi, Sujan Pandey, Alberto García Ortiz, Manfred Glesner: On the Necessity of Combining Coding with Spacing and Shielding for Improving Performance and Power in Very Deep Sub-micron Interconnects. PATMOS 2007: 242-254
2006
20	EE	Tudor Murgan, Massoud Momeni, Alberto García Ortiz, Manfred Glesner: A high-level compact pattern-dependent delay model for high-speed point-to-point interconnects. ICCAD 2006: 323-328
19	EE	José Carlos S. Palma, Ricardo A. L. Reis, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Fernando Gehm Moraes: Evaluating the Impact of Data Encoding Techniques on the Power Consumption in Networks-on-Chip. ISVLSI 2006: 426-427
18	EE	Tudor Murgan, Petru Bogdan Bacinschi, Alberto García Ortiz, Manfred Glesner: Partial Bus-Invert Bus Encoding Schemes for Low-Power DSP Systems Considering Inter-wire Capacitance. PATMOS 2006: 169-180
17	EE	José Carlos S. Palma, Leandro Soares Indrusiak, Fernando Gehm Moraes, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Adaptive Coding in Networks-on-Chip: Transition Activity Reduction Versus Power Overhead of the Codec Circuitry. PATMOS 2006: 603-613
2005
16	EE	Alberto García Ortiz, Tudor Murgan, Mihail Petrov, Manfred Glesner: A linear model for high-level delay estimation in VDSM on-chip interconnects. ISCAS (2) 2005: 1078-1081
2004
15	EE	Tudor Murgan, Alberto García Ortiz, Clemens Schlachta, Heiko Zimmer, Mihail Petrov, Manfred Glesner: On Timing and Power Consumption in Inductively Coupled On-Chip Interconnects. PATMOS 2004: 819-828
14	EE	Alberto García Ortiz, Tudor Murgan, Manfred Glesner: Moment-Based Estimation of Switching Activity for Correlated Distributions. PATMOS 2004: 859-868
13	EE	Tudor Murgan, Clemens Schlachta, Mihail Petrov, Leandro Soares Indrusiak, Alberto García Ortiz, Manfred Glesner, Ricardo A. L. Reis: Accurate capture of timing parameters in inductively-coupled on-chip interconnects. SBCCI 2004: 117-122
2003
12	EE	Tudor Murgan, Mihail Petrov, Alberto García Ortiz, Ralf Ludewig, Peter Zipf, Thomas Hollstein, Manfred Glesner, Bernard Ölkrug, Jörg Brakensiek: Evaluation and Run-Time Optimization of On-chip Communication Structures in Reconfigurable Architectures. FPL 2003: 1111-1114
11	EE	Alberto García Ortiz, Lukusa D. Kabulepa, Tudor Murgan, Manfred Glesner: Moment-Based Power Estimation in Very Deep Submicron Technologies. ICCAD 2003: 107-112
10	EE	Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Juan Jesus, Ocampo Hidalgo, Manfred Glesner: Emulation of Analog Components for the Rapid Prototyping of Wireless Baseband Systems. IEEE International Workshop on Rapid System Prototyping 2003: 172-178
9	EE	Alberto García Ortiz, Lukusa D. Kabulepa, Manfred Glesner: Switching Activity Estimation in Non-linear Architectures. PATMOS 2003: 269-278
8	EE	Alberto García Ortiz, Tudor Murgan, Manfred Glesner: Transition Activity Estimation for General Correlated Data Distributions. VLSI Design 2003: 440-445
2002
7	EE	Alberto García Ortiz, Lukusa D. Kabulepa, Manfred Glesner: Estimation of Power Consumption in Encoded Data Buses. DATE 2002: 1103
6	EE	Chun Hok Ho, Philip Heng Wai Leong, Kuen Hung Tsoi, Ralf Ludewig, Peter Zipf, Alberto García Ortiz, Manfred Glesner: Fly - A Modifiable Hardware Compiler. FPL 2002: 381-390
5	EE	Ralf Ludewig, Alberto García Ortiz, Tudor Murgan, Manfred Glesner: Power Estimation Based on Transition Activity Analysis with an Architecture Precise Rapid Prototyping System. IEEE International Workshop on Rapid System Prototyping 2002: 138-
4	EE	Abdulfattah Mohammad Obeid, Alberto García Ortiz, Ralf Ludewig, Manfred Glesner: Prototyping of a High Performance Generic Viterbi Decoder. IEEE International Workshop on Rapid System Prototyping 2002: 42-47
3	EE	Lukusa D. Kabulepa, Alberto García Ortiz, Manfred Glesner: Power reduction techniques for an OFDM burst synchronization core. ISCAS (1) 2002: 265-268
2	EE	Lukusa D. Kabulepa, Alberto García Ortiz, Manfred Glesner: Design of an efficient OFDM burst synchronization scheme. ISCAS (3) 2002: 449-452
1	EE	Alberto García Ortiz, Lukusa D. Kabulepa, Manfred Glesner: Efficient estimation of signal transition activity in MAC architectures. ISLPED 2002: 319-322

Coauthor Index

1	Petru Bogdan Bacinschi	[18] [21]
2	Jörg Brakensiek	[12]
3	Manfred Glesner	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
4	Ocampo Hidalgo	[10]
5	Chun Hok Ho	[6]
6	Thomas Hollstein	[12]
7	Leandro Soares Indrusiak	[13] [17] [19] [22] [23]
8	Juan Jesus	[10]
9	Lukusa D. Kabulepa	[1] [2] [3] [7] [9] [11]
10	Philip Heng Wai Leong	[6]
11	Ralf Ludewig	[4] [5] [6] [10] [12]
12	Massoud Momeni	[20]
13	Fernando Gehm Moraes (Fernando Moraes)	[17] [19] [22]
14	Tudor Murgan	[5] [8] [10] [11] [12] [13] [14] [15] [16] [18] [20] [21] [23]
15	Abdulfattah Mohammad Obeid	[4]
16	Bernard Ölkrug	[12]
17	José Carlos S. Palma	[17] [19] [22]
18	Sujan Pandey	[21]
19	Mihail Petrov	[12] [13] [15] [16]
20	Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis)	[13] [17] [19] [22]
21	Clemens Schlachta	[13] [15]
22	Kuen Hung Tsoi	[6]
23	Heiko Zimmer	[15]
24	Peter Zipf	[6] [12]