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Kanupriya Gulati

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2009
19EEJeff L. Cobb, Kanupriya Gulati, Sunil P. Khatri: Robust window-based multi-node technology-independent logic minimization. ACM Great Lakes Symposium on VLSI 2009: 357-362
18EEKalyana C. Bollapalli, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri: Low power and high performance sram design using bank-based selective forward body bias. ACM Great Lakes Symposium on VLSI 2009: 441-444
17EEKanupriya Gulati, Sunil P. Khatri, Peng Li: Closed-loop modeling of power and temperature profiles of FPGAs. FPGA 2009: 287
16EEKanupriya Gulati, Suganth Paul, Sunil P. Khatri, Srinivas Patil, Abhijit Jas: FPGA-based hardware acceleration for Boolean satisfiability. ACM Trans. Design Autom. Electr. Syst. 14(2): (2009)
2008
15EEKanupriya Gulati, Sunil P. Khatri: Improving FPGA routability using network coding. ACM Great Lakes Symposium on VLSI 2008: 147-150
14EEKanupriya Gulati, Sunil P. Khatri: Towards acceleration of fault simulation using graphics processing units. DAC 2008: 822-827
13EENikhil Saluja, Kanupriya Gulati, Sunil P. Khatri: SAT-based ATPG using multilevel compatible don't-cares. ACM Trans. Design Autom. Electr. Syst. 13(2): (2008)
12EEKanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri, D. M. H. Walker: A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations. Integration 41(3): 399-412 (2008)
2007
11EEEugene Goldberg, Kanupriya Gulati: On Complexity of Internal and External Equivalence Checking. DSD 2007: 197-206
10EEEugene Goldberg, Kanupriya Gulati, Sunil P. Khatri: Toggle Equivalence Preserving (TEP) Logic Optimization. DSD 2007: 271-279
9EEKanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri: A Structured ASIC Design Approach Using Pass Transistor Logic. ISCAS 2007: 1787-1790
2006
8EERajesh Garg, Mario Sanchez, Kanupriya Gulati, Nikhil Jayakumar, Anshul Gupta, Sunil P. Khatri: A design flow to optimize circuit delay by using standard cells and PLAs. ACM Great Lakes Symposium on VLSI 2006: 217-222
7EEBrock J. LaMeres, Kanupriya Gulati, Sunil P. Khatri: Controlling inductive cross-talk and power in off-chip buses using CODECs. ASP-DAC 2006: 850-855
6EENikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson: Network coding for routability improvement in VLSI. ICCAD 2006: 820-823
5EEMandar Waghmode, Kanupriya Gulati, Sunil P. Khatri, Weiping Shi: An Efficient, Scalable Hardware Engine for Boolean SATisfiability. ICCD 2006
4EEKanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri: A probabilistic method to determine the minimum leakage vector for combinational designs. ISCAS 2006
3EEKanupriya Gulati, M. Lovell, Sunil P. Khatri: Efficient don't care computation for hierarchical designs. ISCAS 2006
2EEChunjie Duan, Kanupriya Gulati, Sunil P. Khatri: Memory-based crosstalk canceling CODECs for on-chip buses. ISCAS 2006
2005
1EEKanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri: An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. ISLPED 2005: 111-114

Coauthor Index

1Kalyana C. Bollapalli [18]
2Jeff L. Cobb [19]
3Chunjie Duan [2]
4Rajesh Garg [8] [18]
5Eugene Goldberg (Evguenii I. Goldberg) [10] [11]
6Anshul Gupta [8]
7Abhijit Jas [16]
8Nikhil Jayakumar [1] [4] [6] [8] [9] [12]
9Sunil P. Khatri [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [12] [13] [14] [15] [16] [17] [18] [19]
10Brock J. LaMeres [7]
11Peng Li [17]
12M. Lovell [3]
13Srinivas Patil [16]
14Suganth Paul [16]
15Nikhil Saluja [13]
16Mario Sanchez [8]
17Weiping Shi [5]
18Alexander Sprintson [6]
19Mandar Waghmode [5]
20D. M. H. Walker (Duncan M. Hank Walker) [12]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)