| 2009 |
|---|
| 10 | EE | Kwangok Jeong,
Andrew B. Kahng,
Hailong Yao:
Revisiting the linear programming framework for leakage power vs. performance optimization.
ISQED 2009: 127-134 |
| 2008 |
|---|
| 9 | EE | Kwangok Jeong,
Andrew B. Kahng,
Chul-Hong Park,
Hailong Yao:
Dose map and placement co-optimization for timing yield enhancement and leakage power reduction.
DAC 2008: 516-521 |
| 8 | EE | Andrew B. Kahng,
Chul-Hong Park,
Xu Xu,
Hailong Yao:
Layout decomposition for double patterning lithography.
ICCAD 2008: 465-472 |
| 2007 |
|---|
| 7 | EE | Hailong Yao,
Yici Cai,
Xianlong Hong:
CMP-aware Maze Routing Algorithm for Yield Enhancement.
ISVLSI 2007: 239-244 |
| 2006 |
|---|
| 6 | EE | Xianlong Hong,
Yici Cai,
Hailong Yao,
Duo Li:
DFM-aware Routing for Yield Enhancement.
APCCAS 2006: 1091-1094 |
| 5 | EE | Hailong Yao,
Subarna Sinha,
Charles Chiang,
Xianlong Hong,
Yici Cai:
Efficient process-hotspot detection using range pattern matching.
ICCAD 2006: 625-632 |
| 4 | EE | Hailong Yao,
Yici Cai,
Xianlong Hong:
Congestion-driven W-shape multilevel full-chip routing framework.
ISCAS 2006 |
| 2005 |
|---|
| 3 | EE | Hailong Yao,
Yici Cai,
Xianlong Hong,
Qiang Zhou:
Improved multilevel routing with redundant via placement for yield and reliability.
ACM Great Lakes Symposium on VLSI 2005: 143-146 |
| 2 | EE | Hailong Yao,
Yici Cai,
Qiang Zhou,
Xianlong Hong:
Crosstalk-Aware Routing Resource Assignment.
J. Comput. Sci. Technol. 20(2): 231-236 (2005) |
| 2004 |
|---|
| 1 | | Hailong Yao,
Qiang Zhou,
Xianlong Hong,
Yici Cai:
Crosstalk driven routing resource assignment.
ISCAS (5) 2004: 89-92 |
