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Hailong Yao

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2009
10EEKwangok Jeong, Andrew B. Kahng, Hailong Yao: Revisiting the linear programming framework for leakage power vs. performance optimization. ISQED 2009: 127-134
2008
9EEKwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao: Dose map and placement co-optimization for timing yield enhancement and leakage power reduction. DAC 2008: 516-521
8EEAndrew B. Kahng, Chul-Hong Park, Xu Xu, Hailong Yao: Layout decomposition for double patterning lithography. ICCAD 2008: 465-472
2007
7EEHailong Yao, Yici Cai, Xianlong Hong: CMP-aware Maze Routing Algorithm for Yield Enhancement. ISVLSI 2007: 239-244
2006
6EEXianlong Hong, Yici Cai, Hailong Yao, Duo Li: DFM-aware Routing for Yield Enhancement. APCCAS 2006: 1091-1094
5EEHailong Yao, Subarna Sinha, Charles Chiang, Xianlong Hong, Yici Cai: Efficient process-hotspot detection using range pattern matching. ICCAD 2006: 625-632
4EEHailong Yao, Yici Cai, Xianlong Hong: Congestion-driven W-shape multilevel full-chip routing framework. ISCAS 2006
2005
3EEHailong Yao, Yici Cai, Xianlong Hong, Qiang Zhou: Improved multilevel routing with redundant via placement for yield and reliability. ACM Great Lakes Symposium on VLSI 2005: 143-146
2EEHailong Yao, Yici Cai, Qiang Zhou, Xianlong Hong: Crosstalk-Aware Routing Resource Assignment. J. Comput. Sci. Technol. 20(2): 231-236 (2005)
2004
1 Hailong Yao, Qiang Zhou, Xianlong Hong, Yici Cai: Crosstalk driven routing resource assignment. ISCAS (5) 2004: 89-92

Coauthor Index

1Yici Cai [1] [2] [3] [4] [5] [6] [7]
2Charles Chiang [5]
3Xianlong Hong [1] [2] [3] [4] [5] [6] [7]
4Kwangok Jeong [9] [10]
5Andrew B. Kahng [8] [9] [10]
6Duo Li [6]
7Chul-Hong Park [8] [9]
8Subarna Sinha [5]
9Xu Xu [8]
10Qiang Zhou [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)