| 2008 |
|---|
| 12 | EE | Rajarshi Mukherjee,
Song Liu,
Seda Ogrenci Memik,
Somsubhra Mondal:
A high-level clustering algorithm targeting dual Vdd FPGAs.
ACM Trans. Design Autom. Electr. Syst. 13(4): (2008) |
| 11 | EE | Seda Ogrenci Memik,
Nikolaos Bellas,
Somsubhra Mondal:
Presynthesis Area Estimation of Reconfigurable Streaming Accelerators.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2027-2038 (2008) |
| 2006 |
|---|
| 10 | | Rajarshi Mukherjee,
Somsubhra Mondal,
Seda Ogrenci Memik:
A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead.
ERSA 2006: 56-62 |
| 9 | EE | Somsubhra Mondal,
Seda Ogrenci Memik,
Nikolaos Bellas:
Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs.
FCCM 2006: 325-326 |
| 8 | EE | Somsubhra Mondal,
Seda Ogrenci Memik:
Power Optimization Techniques for SRAM-Based FPGAs.
FPL 2006: 1-2 |
| 7 | EE | Somsubhra Mondal,
Seda Ogrenci Memik,
Nikolaos Bellas:
Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators.
FPL 2006: 1-4 |
| 6 | EE | Rajarshi Mukherjee,
Somsubhra Mondal,
Seda Ogrenci Memik:
Thermal sensor allocation and placement for reconfigurable systems.
ICCAD 2006: 437-442 |
| 5 | EE | Somsubhra Mondal,
Rajarshi Mukherjee,
Seda Ogrenci Memik:
Fine-grain thermal profiling and sensor insertion for FPGAs.
ISCAS 2006 |
| 2005 |
|---|
| 4 | EE | Somsubhra Mondal,
Seda Ogrenci Memik:
Fine-grain leakage optimization in SRAM based FPGAs.
ACM Great Lakes Symposium on VLSI 2005: 238-243 |
| 3 | EE | Somsubhra Mondal,
Seda Ogrenci Memik:
Resource sharing in pipelined CDFG synthesis.
ASP-DAC 2005: 795-798 |
| 2 | EE | Somsubhra Mondal,
Seda Ogrenci Memik,
Debasish Das:
Hierarchical LUT structures for leakage power reduction (abstract only).
FPGA 2005: 272 |
| 1 | EE | Somsubhra Mondal,
Seda Ogrenci Memik:
A low power FPGA routing architecture.
ISCAS (2) 2005: 1222-1225 |
