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Somsubhra Mondal

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2008
12EERajarshi Mukherjee, Song Liu, Seda Ogrenci Memik, Somsubhra Mondal: A high-level clustering algorithm targeting dual Vdd FPGAs. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
11EESeda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal: Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2027-2038 (2008)
2006
10 Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik: A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. ERSA 2006: 56-62
9EESomsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. FCCM 2006: 325-326
8EESomsubhra Mondal, Seda Ogrenci Memik: Power Optimization Techniques for SRAM-Based FPGAs. FPL 2006: 1-2
7EESomsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. FPL 2006: 1-4
6EERajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik: Thermal sensor allocation and placement for reconfigurable systems. ICCAD 2006: 437-442
5EESomsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik: Fine-grain thermal profiling and sensor insertion for FPGAs. ISCAS 2006
2005
4EESomsubhra Mondal, Seda Ogrenci Memik: Fine-grain leakage optimization in SRAM based FPGAs. ACM Great Lakes Symposium on VLSI 2005: 238-243
3EESomsubhra Mondal, Seda Ogrenci Memik: Resource sharing in pipelined CDFG synthesis. ASP-DAC 2005: 795-798
2EESomsubhra Mondal, Seda Ogrenci Memik, Debasish Das: Hierarchical LUT structures for leakage power reduction (abstract only). FPGA 2005: 272
1EESomsubhra Mondal, Seda Ogrenci Memik: A low power FPGA routing architecture. ISCAS (2) 2005: 1222-1225

Coauthor Index

1Nikolaos Bellas [7] [9] [11]
2Debasish Das [2]
3Song Liu [12]
4Seda Ogrenci Memik (Seda Ogrenci) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12]
5Rajarshi Mukherjee [5] [6] [10] [12]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)