| 2007 |
|---|
| 8 | EE | Wei-Shen Wang,
Michael Orshansky:
Estimation of Leakage Power Consumption and Parametric Yield Based on Realistic Probabilistic Descriptions of Parameters.
J. Low Power Electronics 3(1): 1-12 (2007) |
| 2006 |
|---|
| 7 | EE | Wei-Shen Wang,
Vladik Kreinovich,
Michael Orshansky:
Statistical timing based on incomplete probabilistic descriptions of parameter uncertainty.
DAC 2006: 161-166 |
| 6 | EE | Wei-Shen Wang,
Michael Orshansky:
Robust estimation of parametric yield under limited descriptions of uncertainty.
ICCAD 2006: 884-890 |
| 5 | EE | Bin Zhang,
Wei-Shen Wang,
Michael Orshansky:
FASER: Fast Analysis of Soft Error Susceptibility for Cell-Based Designs.
ISQED 2006: 755-760 |
| 4 | EE | Michael Orshansky,
Wei-Shen Wang,
Martine Ceberio,
Gang Xiang:
Interval-based robust statistical techniques for non-negative convex functions, with application to timing analysis of computer chips.
SAC 2006: 1645-1649 |
| 3 | EE | Wei-Shen Wang,
Michael Orshansky:
Path-Based Statistical Timing Analysis Handling Arbitrary Delay Correlations: Theory and Implementation.
IEEE Trans. on CAD of Integrated Circuits and Systems 25(12): 2976-2988 (2006) |
| 2 | EE | Wei-Shen Wang,
Michael Liu,
Michael Orshansky:
Analysis of Leakage Power Reduction in Dual-Vth Technologies in the Presence of Large Threshold Voltage Variation.
J. Low Power Electronics 2(1): 1-7 (2006) |
| 2004 |
|---|
| 1 | EE | Michael Liu,
Wei-Shen Wang,
Michael Orshansky:
Leakage power reduction by dual-vth designs under probabilistic analysis of vth variation.
ISLPED 2004: 2-7 |
