Seda Ogrenci Memik

Seda Ogrenci

2008
53	EE	Jieyi Long, Seda Ogrenci Memik: Automated design of self-adjusting pipelines. DAC 2008: 211-216
52	EE	Min Ni, Seda Ogrenci Memik: Leakage power-aware clock skew scheduling: converting stolen time into leakage power reduction. DAC 2008: 610-613
51	EE	Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik: A power and temperature aware DRAM architecture. DAC 2008: 878-883
50	EE	Brian Leung, Yan Pan, Chris Schroeder, Seda Ogrenci Memik, Gokhan Memik, Mitra J. Z. Hartmann: Towards an "early neural circuit simulator": A FPGA implementation of processing in the rat whisker system. FPL 2008: 191-196
49	EE	Song Liu, Seda Ogrenci Memik, Yu Zhang, Gokhan Memik: An approach for adaptive DRAM temperature and power management. ICS 2008: 63-72
48	EE	Jieyi Long, Hai Zhou, Seda Ogrenci Memik: An O(nlogn) edge-based algorithm for obstacle-avoiding rectilinear steiner tree construction. ISPD 2008: 126-133
47	EE	Rajarshi Mukherjee, Song Liu, Seda Ogrenci Memik, Somsubhra Mondal: A high-level clustering algorithm targeting dual Vdd FPGAs. ACM Trans. Design Autom. Electr. Syst. 13(4): (2008)
46	EE	Seda Ogrenci Memik, Nikolaos Bellas, Somsubhra Mondal: Presynthesis Area Estimation of Reconfigurable Streaming Accelerators. IEEE Trans. on CAD of Integrated Circuits and Systems 27(11): 2027-2038 (2008)
45	EE	Jieyi Long, Hai Zhou, Seda Ogrenci Memik: EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2169-2182 (2008)
44	EE	Seda Ogrenci Memik, Rajarshi Mukherjee, Min Ni, Jieyi Long: Optimizing Thermal Sensor Allocation for Microprocessors. IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 516-527 (2008)
43	EE	Jieyi Long, Seda Ogrenci Memik, Gokhan Memik, Rajarshi Mukherjee: Thermal monitoring mechanisms for chip multiprocessors. TACO 5(2): (2008)
2007
42	EE	Min Ni, Seda Ogrenci Memik: Self-heating-aware optimal wire sizing under Elmore delay model. DATE 2007: 1373-1378
41	EE	Marco D. Santambrogio, Seda Ogrenci Memik, Vincenzo Rana, Umut A. Acar, Donatella Sciuto: A novel SoC design methodology combining adaptive software and reconfigurable hardware. ICCAD 2007: 303-308
40	EE	Min Ni, Seda Ogrenci Memik: Early planning for clock skew scheduling during register binding. ICCAD 2007: 429-434
39	EE	Jieyi Long, Ja Chun Ku, Seda Ogrenci Memik, Yehea I. Ismail: A self-adjusting clock tree architecture to cope with temperature variations. ICCAD 2007: 75-82
2006
38	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: Systematic temperature sensor allocation and placement for microprocessors. DAC 2006: 542-547
37		Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik: A Sensor Distribution Algorithm for FPGAs with Minimal Dynamic Reconfiguration Overhead. ERSA 2006: 56-62
36	EE	Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs. FCCM 2006: 325-326
35	EE	Giovanni Agosta, Marco D. Santambrogio, Seda Ogrenci Memik: Adaptive Metrics for System-Level Functional Partitioning. FDL 2006: 153-155
34	EE	Somsubhra Mondal, Seda Ogrenci Memik: Power Optimization Techniques for SRAM-Based FPGAs. FPL 2006: 1-2
33	EE	Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas: Pre-Synthesis Area Estimation of Reconfigurable Streaming Accelerators. FPL 2006: 1-4
32	EE	Min Ni, Seda Ogrenci Memik: Thermal-induced leakage power optimization by redundant resource allocation. ICCAD 2006: 297-302
31	EE	Rajarshi Mukherjee, Somsubhra Mondal, Seda Ogrenci Memik: Thermal sensor allocation and placement for reconfigurable systems. ICCAD 2006: 437-442
30	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: Physical aware frequency selection for dynamic thermal management in multi-core systems. ICCAD 2006: 547-552
29	EE	Somsubhra Mondal, Rajarshi Mukherjee, Seda Ogrenci Memik: Fine-grain thermal profiling and sensor insertion for FPGAs. ISCAS 2006
28	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: An Integrated Approach to Thermal Management in High-Level Synthesis. IEEE Trans. VLSI Syst. 14(11): 1165-1174 (2006)
2005
27	EE	Somsubhra Mondal, Seda Ogrenci Memik: Fine-grain leakage optimization in SRAM based FPGAs. ACM Great Lakes Symposium on VLSI 2005: 238-243
26	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: Evaluation of dual VDD fabrics for low power FPGAs. ASP-DAC 2005: 1240-1243
25	EE	Somsubhra Mondal, Seda Ogrenci Memik: Resource sharing in pipelined CDFG synthesis. ASP-DAC 2005: 795-798
24	EE	Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik: Temperature-aware resource allocation and binding in high-level synthesis. DAC 2005: 196-201
23	EE	Somsubhra Mondal, Seda Ogrenci Memik, Debasish Das: Hierarchical LUT structures for leakage power reduction (abstract only). FPGA 2005: 272
22		David Nguyen, Gokhan Memik, Seda Ogrenci Memik, Alok N. Choudhary: Real-Time Feature Extraction for High Speed Networks. FPL 2005: 438-443
21	EE	Roozbeh Jafari, Seda Ogrenci Memik, Majid Sarrafzadeh: Quick Reconfiguration in Clustered Micro-Sequencer. IPDPS 2005
20	EE	Somsubhra Mondal, Seda Ogrenci Memik: A low power FPGA routing architecture. ISCAS (2) 2005: 1222-1225
19	EE	Rajarshi Mukherjee, Seda Ogrenci Memik, Gokhan Memik: Peak temperature control and leakage reduction during binding in high level synthesis. ISLPED 2005: 251-256
18	EE	Seda Ogrenci Memik, Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh: A scheduling algorithm for optimization and early planning in high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 10(1): 33-57 (2005)
17	EE	Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh: On effective slack management in postscheduling phase. IEEE Trans. on CAD of Integrated Circuits and Systems 24(4): 645-653 (2005)
16	EE	Eren Kursun, Rajarshi Mukherjee, Seda Ogrenci Memik: Early Quality Assessment for Low Power Behavioral Synthesis. J. Low Power Electronics 1(3): 273-285 (2005)
2004
15	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: Power Management for FPGAs: Power-Driven Design Partitioning. FCCM 2004: 326-327
14	EE	Rajarshi Mukherjee, Seda Ogrenci Memik: Power-Driven Design Partitioning. FPL 2004: 740-750
13	EE	Elaheh Bozorgzadeh, Seda Ogrenci Memik, Xiaojian Yang, Majid Sarrafzadeh: Routability-Driven Packing: Metrics And Algorithms For Cluster-Based FPGAs. Journal of Circuits, Systems, and Computers 13(1): 77-100 (2004)
2003
12	EE	Seda Ogrenci Memik, Gokhan Memik, Roozbeh Jafari, Eren Kursun: Global resource sharing for synthesis of control data flow graphs on FPGAs. DAC 2003: 604-609
11	EE	Ankur Srivastava, Seda Ogrenci Memik, Bo-Kyung Choi, Majid Sarrafzadeh: Achieving Design Closure Through Delay Relaxation Parameter. ICCAD 2003: 54-57
10	EE	Seda Ogrenci Memik, Aggelos K. Katsaggelos, Majid Sarrafzadeh: Analysis and FPGA Implementation of Image Restoration under Resource Constraints. IEEE Trans. Computers 52(3): 390-399 (2003)
2002
9	EE	Gokhan Memik, Seda Ogrenci Memik, William H. Mangione-Smith: Design and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable Logic. FCCM 2002: 131-
8	EE	Seda Ogrenci Memik, Farzan Fallah: Accelerated SAT-based Scheduling of Control/Data Flow Graphs. ICCD 2002: 395-
7	EE	Eren Kursun, Ankur Srivastava, Seda Ogrenci Memik, Majid Sarrafzadeh: Early evaluation techniques for low power binding. ISLPED 2002: 160-165
6	EE	Ryan Kastner, Adam Kaplan, Seda Ogrenci Memik, Elaheh Bozorgzadeh: Instruction generation for hybrid reconfigurable systems. ACM Trans. Design Autom. Electr. Syst. 7(4): 605-627 (2002)
2001
5	EE	Elaheh Bozorgzadeh, Seda Ogrenci Memik, Majid Sarrafzadeh: RPack: routability-driven packing for cluster-based FPGAs. ASP-DAC 2001: 629-634
4	EE	Kia Bazargan, Seda Ogrenci, Majid Sarrafzadeh: Integrating Scheduling and Physical Design into a Coherent Compilation Cycle for Reconfigurable Computing Architectures. DAC 2001: 635-640
3	EE	Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh: Instruction Generation for Hybrid Reconfigurable Systems. ICCAD 2001: 127-
2	EE	Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh: A Super-Scheduler for Embedded Reconfigurable Systems. ICCAD 2001: 391-
2000
1	EE	Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh: A C to Hardware/Software Compiler. FCCM 2000: 331-332

Coauthor Index

1	Umut A. Acar	[41]
2	Giovanni Agosta	[35]
3	Kia Bazargan	[1] [4]
4	Nikolaos Bellas	[33] [36] [46]
5	Elaheh Bozorgzadeh (Eli Bozorgzadeh)	[2] [3] [5] [6] [13] [18]
6	Bo-Kyung Choi	[11] [17]
7	Alok N. Choudhary	[22]
8	Debasish Das	[23]
9	Farzan Fallah	[8]
10	Mitra J. Z. Hartmann	[50]
11	Yehea I. Ismail	[39]
12	Roozbeh Jafari	[12] [21]
13	Adam Kaplan	[6]
14	Ryan Kastner	[1] [2] [3] [6] [18]
15	Aggelos K. Katsaggelos	[10]
16	Ja Chun Ku	[39]
17	Eren Kursun	[7] [12] [16]
18	Brian Leung	[50]
19	Song Liu	[47] [49] [51]
20	Jieyi Long	[39] [43] [44] [45] [48] [53]
21	William H. Mangione-Smith	[9]
22	Gokhan Memik	[9] [12] [19] [22] [24] [43] [49] [50] [51]
23	Somsubhra Mondal	[20] [23] [25] [27] [29] [31] [33] [34] [36] [37] [46] [47]
24	Rajarshi Mukherjee	[14] [15] [16] [19] [24] [26] [28] [29] [30] [31] [37] [38] [43] [44] [47]
25	David Nguyen	[22]
26	Min Ni	[32] [40] [42] [44] [52]
27	Yan Pan	[50]
28	Vincenzo Rana	[41]
29	Marco D. Santambrogio	[35] [41]
30	Majid Sarrafzadeh	[1] [2] [3] [4] [5] [7] [10] [11] [13] [17] [18] [21]
31	Chris Schroeder	[50]
32	Donatella Sciuto	[41]
33	Ankur Srivastava	[7] [11] [17]
34	Xiaojian Yang	[13]
35	Yu Zhang	[49] [51]
36	Hai Zhou	[45] [48]

Colors in the list of coauthors