2009 |
78 | EE | Chandra S. Nagarajan,
Lin Yuan,
Gang Qu,
Barbara G. Stamps:
Leakage optimization using transistor-level dual threshold voltage cell library.
ISQED 2009: 62-67 |
2008 |
77 | EE | Aydin O. Balkan,
Gang Qu,
Uzi Vishkin:
An area-efficient high-throughput hybrid interconnection network for single-chip parallel processing.
DAC 2008: 435-440 |
76 | EE | Malcolm Taylor,
Chi-En Yin,
Min Wu,
Gang Qu:
A Hardware-Assisted Data Hiding Based Approach in Building High-Performance Trusted Computing Systems.
HOST 2008: 93-96 |
75 | EE | Lin Yuan,
Gang Qu,
Tiziano Villa,
Alberto L. Sangiovanni-Vincentelli:
An FSM Reengineering Approach to Sequential Circuit Synthesis by State Splitting.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(6): 1159-1164 (2008) |
2007 |
74 | EE | Lin Yuan,
Gang Qu:
ALT-DVS: Dynamic Voltage Scaling with Awareness of Leakage and Temperature for Real-Time Systems.
AHS 2007: 660-670 |
73 | EE | Noureddine Mehallegue,
Emi Garcia,
Ahmed Bouridane,
Gang Qu:
Improving Key Distribution forWireless Sensor Networks.
AHS 2007: 82-88 |
72 | EE | Lin Yuan,
Gang Qu:
Simultaneous input vector selection and dual threshold voltage assignment for static leakage minimization.
ICCAD 2007: 548-551 |
71 | EE | Gang Qu:
Power Management of Multicore Multiple Voltage Embedded Systems by Task Scheduling.
ICPP Workshops 2007: 34 |
70 | EE | Shaoxiong Hua,
Gang Qu,
Shuvra S. Bhattacharyya:
Probabilistic design of multimedia embedded systems.
ACM Trans. Embedded Comput. Syst. 6(3): (2007) |
69 | EE | Hongfang Liu,
Barry Zeeberg,
Gang Qu,
Akif Günes Koru,
Alessandro Ferrucci,
Ari Kahn,
Michael C. Ryan,
Antej Nuhanovic,
Peter J. Munson,
William C. Reinhold,
David W. Kane,
John N. Weinstein:
AffyProbeMiner: a web resource for computing or retrieving accurately redefined Affymetrix probe sets.
Bioinformatics 23(18): 2385-2390 (2007) |
68 | EE | Sumitkumar N. Pamnani,
Deepak N. Agarwal,
Gang Qu,
Donald Yeung:
Low Power System Design by Combining Software Prefetching and Dynamic voltage Scaling.
Journal of Circuits, Systems, and Computers 16(5): 745-767 (2007) |
2006 |
67 | | Gang Qu,
Yehea I. Ismail,
Narayanan Vijaykrishnan,
Hai Zhou:
Proceedings of the 16th ACM Great Lakes Symposium on VLSI 2006, Philadelphia, PA, USA, April 30 - May 1, 2006
ACM 2006 |
66 | EE | Lin Yuan,
Gang Qu,
Lahouari Ghouti,
Ahmed Bouridane:
VLSI Design IP Protection: Solutions, New Challenges, and Opportunities.
AHS 2006: 469-476 |
65 | EE | Shaoxiong Hua,
Pushkin R. Pari,
Gang Qu:
Dual-Processor Design of Energy Efficient Fault-Tolerant System.
ASAP 2006: 239-244 |
64 | EE | Aydin O. Balkan,
Gang Qu,
Uzi Vishkin:
A Mesh-of-Trees Interconnection Network for Single-Chip Parallel Processing.
ASAP 2006: 73-80 |
63 | EE | Lin Yuan,
Sean Leventhal,
Gang Qu:
Temperature-aware leakage minimization technique for real-time systems.
ICCAD 2006: 761-764 |
62 | EE | Lige Yu,
Lin Yuan,
Gang Qu,
Anthony Ephremides:
Energy-driven detection scheme with guaranteed accuracy.
IPSN 2006: 284-291 |
61 | EE | Shaoxiong Hua,
Gang Qu,
Shuvra S. Bhattacharyya:
Energy-efficient embedded software implementation on multiprocessor system-on-chip with multiple voltages.
ACM Trans. Embedded Comput. Syst. 5(2): 321-341 (2006) |
60 | EE | Lin Yuan,
Gang Qu:
A combined gate replacement and input vector control approach for leakage current reduction.
IEEE Trans. VLSI Syst. 14(2): 173-182 (2006) |
2005 |
59 | | John Lach,
Gang Qu,
Yehea I. Ismail:
Proceedings of the 15th ACM Great Lakes Symposium on VLSI 2005, Chicago, Illinois, USA, April 17-19, 2005
ACM 2005 |
58 | EE | Lin Yuan,
Gang Qu,
Ankur Srivastava:
VLSI CAD tool protection by birthmarking design solutions.
ACM Great Lakes Symposium on VLSI 2005: 341-344 |
57 | EE | Vida Kianzad,
Shuvra S. Bhattacharyya,
Gang Qu:
CASPER: An Integrated Energy-Driven Approach for Task Graph Scheduling on Distributed Embedded Systems.
ASAP 2005: 191-197 |
56 | EE | Lin Yuan,
Gang Qu,
Tiziano Villa,
Alberto L. Sangiovanni-Vincentelli:
FSM re-engineering and its application in low power state encoding.
ASP-DAC 2005: 254-259 |
55 | EE | Shaoxiong Hua,
Gang Qu:
Power minimization techniques on distributed real-time systems by global and local slack management.
ASP-DAC 2005: 830-835 |
54 | EE | Lin Yuan,
Gang Qu:
Enhanced leakage reduction Technique by gate replacement.
DAC 2005: 47-50 |
53 | EE | Sean Leventhal,
Lin Yuan,
Neal K. Bambha,
Shuvra S. Bhattacharyya,
Gang Qu:
DSP Address Optimization Using Evolutionary Algorithms.
SCOPES 2005: 91-98 |
52 | EE | Lin Yuan,
Gang Qu:
Analysis of energy reduction on dynamic voltage scaling-enabled systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1827-1837 (2005) |
2004 |
51 | | Pushkin R. Pari,
Jane Lin,
Lin Yuan,
Gang Qu:
Generating 'Random' 3-SAT Instances with Specific Solution Space Structure.
AAAI 2004: 960-961 |
50 | | Lin Yuan,
Pushkin R. Pari,
Gang Qu:
Finding Redundant Constraints for FSM Minimization.
AAAI 2004: 976-977 |
49 | EE | Shaoxiong Hua,
Gang Qu:
Energy-efficient dual-voltage soft real-time system with (m, k)-firm deadline guarantee.
CASES 2004: 116-123 |
48 | | Shaoxiong Hua,
Gang Qu:
QoS-driven scheduling for multimedia applications.
ISCAS (2) 2004: 125-128 |
47 | | Deepak N. Agarwal,
Sumitkumar N. Pamnani,
Gang Qu,
Donald Yeung:
Transferring performance gain from software prefetching to energy reduction.
ISCAS (2) 2004: 241-244 |
46 | | Aydin O. Balkan,
Gang Qu,
Uzi Vishkin:
Arbitrate-and-move primitives for high throughput on-chip interconnection networks.
ISCAS (2) 2004: 441-444 |
45 | | Pushkin R. Pari,
Lin Yuan,
Gang Qu:
How many solutions does a SAT instance have?
ISCAS (5) 2004: 209-212 |
44 | EE | Lin Yuan,
Pushkin R. Pari,
Gang Qu:
Soft IP Protection: Watermarking HDL Codes.
Information Hiding 2004: 224-238 |
43 | EE | Lin Yuan,
Gang Qu:
Information Hiding in Finite State Machine.
Information Hiding 2004: 340-354 |
42 | EE | Jennifer L. Wong,
Gang Qu,
Miodrag Potkonjak:
Power minimization in QoS sensitive systems.
IEEE Trans. VLSI Syst. 12(6): 553-561 (2004) |
41 | EE | Jennifer L. Wong,
Gang Qu,
Miodrag Potkonjak:
Optimization-intensive watermarking techniques for decision problems.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(1): 119-127 (2004) |
40 | EE | Andrew E. Caldwell,
Hyun-Jin Choi,
Andrew B. Kahng,
Stefanus Mantik,
Miodrag Potkonjak,
Gang Qu,
Jennifer L. Wong:
Effective iterative techniques for fingerprinting design IP.
IEEE Trans. on CAD of Integrated Circuits and Systems 23(2): 208-215 (2004) |
39 | EE | Gang Qu,
Miodrag Potkonjak,
Mile K. Stojcev:
Book review: Intellectual property protection in VLSI designs: Theory and practice, Hardcover, pp 183, plus XIX, Kluwer Academic Publishers, Boston, 2003, ISBN 1-4020-7320-8.
Microelectronics Reliability 44(4): 705-706 (2004) |
2003 |
38 | EE | Adarsh K. Jain,
Lin Yuan,
Pushkin R. Pari,
Gang Qu:
Zero overhead watermarking technique for FPGA designs.
ACM Great Lakes Symposium on VLSI 2003: 147-152 |
37 | EE | Shaoxiong Hua,
Gang Qu,
Shuvra S. Bhattacharyya:
Energy reduction techniques for multimedia applications with tolerance to deadline misses.
DAC 2003: 131-136 |
36 | EE | Shaoxiong Hua,
Gang Qu,
Shuvra S. Bhattacharyya:
Energy-Efficient Multi-processor Implementation of Embedded Software.
EMSOFT 2003: 257-273 |
35 | | Shaoxiong Hua,
Gang Qu:
On-line Voltage Scheduling for Multimedia Applications.
ESTImedia 2003: 24-31 |
34 | EE | Shaoxiong Hua,
Gang Qu:
Approaching the Maximum Energy Saving on Embedded Systems with Multiple Voltages.
ICCAD 2003: 26-29 |
33 | EE | Shaoxiong Hua,
Gang Qu,
Shuvra S. Bhattacharyya:
Exploring the Probabilistic Design Space of Multimedia Systems.
IEEE International Workshop on Rapid System Prototyping 2003: 233- |
32 | EE | Shaoxiong Hua,
Gang Qu:
A New Quality of Service Metric for Hard/Soft Real-Time Applications.
ITCC 2003: 347-351 |
31 | EE | Gang Qu:
Introducing The Concept Of Design Reuse Into Undergraduate Digital Design Curriculum.
MSE 2003: 10-11 |
30 | EE | Giacomino Veltri,
Qingfeng Huang,
Gang Qu,
Miodrag Potkonjak:
Minimal and maximal exposure path algorithms for wireless embedded sensor networks.
SenSys 2003: 40-50 |
29 | EE | Gang Qu,
Miodrag Potkonjak:
System synthesis of synchronous multimedia applications.
ACM Trans. Embedded Comput. Syst. 2(1): 74-97 (2003) |
2002 |
28 | EE | Lin Yuan,
Gang Qu:
Design Space Exploration for Energy-Efficient Secure Sensor Network.
ASAP 2002: 88- |
27 | EE | Gang Qu,
Miodrag Potkonjak:
Techniques for energy-efficient communication pipeline design.
IEEE Trans. VLSI Syst. 10(5): 542-549 (2002) |
26 | EE | Gang Qu:
Publicly detectable watermarking for intellectual property authentication in VLSI design.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(11): 1363-1368 (2002) |
25 | EE | Gang Qu,
Naoyuki Kawabe,
Kimiyoshi Usami,
Miodrag Potkonjak:
Code Coverage-Based Power Estimation Techniques for Microprocessors.
Journal of Circuits, Systems, and Computers 11(5): 557- (2002) |
24 | | Seapahn Megerian,
Farinaz Koushanfar,
Gang Qu,
Giacomino Veltri,
Miodrag Potkonjak:
Exposure in Wireless Sensor Networks: Theory and Practical Solutions.
Wireless Networks 8(5): 443-454 (2002) |
2001 |
23 | EE | Gang Qu:
Publicly Detectable Techniques for the Protection of Virtual Components.
DAC 2001: 474-479 |
22 | EE | Farinaz Koushanfar,
Gang Qu:
Hardware Metering.
DAC 2001: 490-493 |
21 | EE | Gang Qu:
What is the Limit of Energy Saving by Dynamic Voltage Scaling?
ICCAD 2001: 560- |
20 | EE | Farinaz Koushanfar,
Gang Qu,
Miodrag Potkonjak:
Intellectual Property Metering.
Information Hiding 2001: 81-95 |
19 | EE | Gang Qu:
Keyless Public Watermarking for Intellectual Property Authentication.
Information Hiding 2001: 96-111 |
18 | EE | Seapahn Meguerdichian,
Farinaz Koushanfar,
Gang Qu,
Miodrag Potkonjak:
Exposure in wireless Ad-Hoc sensor networks.
MOBICOM 2001: 139-150 |
2000 |
17 | EE | Gang Qu,
Jennifer L. Wong,
Miodrag Potkonjak:
Fair watermarking techniques.
ASP-DAC 2000: 55-60 |
16 | EE | Gang Qu,
Miodrag Potkonjak:
Fingerprinting intellectual property using constraint-addition.
DAC 2000: 587-592 |
15 | EE | Gang Qu,
Naoyuki Kawabe,
Kimiyoshi Usami,
Miodrag Potkonjak:
Function-level power estimation methodology for microprocessors.
DAC 2000: 810-813 |
14 | EE | Gang Qu,
Miodrag Potkonjak:
Achieving utility arbitrarily close to the optimal with limited energy.
ISLPED 2000: 125-130 |
13 | EE | Gang Qu,
Miodrag Potkonjak:
Energy minimization with guaranteed quality of service.
ISLPED 2000: 43-49 |
1999 |
12 | EE | Gang Qu,
Jennifer L. Wong,
Miodrag Potkonjak:
Optimization-Intensive Watermarking Techniques for Decision Problems.
DAC 1999: 33-36 |
11 | EE | Andrew E. Caldwell,
Hyun-Jin Choi,
Andrew B. Kahng,
Stefanus Mantik,
Miodrag Potkonjak,
Gang Qu,
Jennifer L. Wong:
Effective Iterative Techniques for Fingerprinting Design IP.
DAC 1999: 843-848 |
10 | EE | Yu Chen,
Andrew B. Kahng,
Gang Qu,
Alexander Zelikovsky:
The associative-skew clock routing problem.
ICCAD 1999: 168-172 |
9 | EE | Gang Qu,
Miodrag Potkonjak:
Power minimization using system-level partitioning of applications with quality of service requirements.
ICCAD 1999: 343-346 |
8 | EE | Gang Qu,
Darko Kirovski,
Miodrag Potkonjak,
Mani B. Srivastava:
Energy minimization of system pipelines using multiple voltages.
ISCAS (1) 1999: 362-365 |
7 | EE | Gang Qu,
Malena R. Mesarina,
Miodrag Potkonjak:
System Synthesis of Synchronous Multimedia Applications.
ISSS 1999: 128-133 |
6 | | Gang Qu,
Miodrag Potkonjak:
Hiding Signatures in Graph Coloring Solutions.
Information Hiding 1999: 348-367 |
5 | EE | Inki Hong,
Darko Kirovski,
Gang Qu,
Miodrag Potkonjak,
Mani B. Srivastava:
Power optimization of variable-voltage core-based systems.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(12): 1702-1714 (1999) |
1998 |
4 | EE | Inki Hong,
Darko Kirovski,
Gang Qu,
Miodrag Potkonjak,
Mani B. Srivastava:
Power Optimization of Variable Voltage Core-Based Systems.
DAC 1998: 176-181 |
3 | EE | Gang Qu,
Miodrag Potkonjak:
Analysis of watermarking techniques for graph coloring problem.
ICCAD 1998: 190-193 |
2 | EE | Gang Qu,
Miodrag Potkonjak:
Techniques for energy minimization of communication pipelines.
ICCAD 1998: 597-600 |
1 | EE | Inki Hong,
Gang Qu,
Miodrag Potkonjak,
Mani B. Srivastava:
Synthesis Techniques for Low-Power Hard Real-Time Systems on Variable Voltage Processors.
IEEE Real-Time Systems Symposium 1998: 178-187 |