| 2008 |
|---|
| 7 | EE | Nimay Shah,
Rupak Samanta,
Ming Zhang,
Jiang Hu,
Duncan Walker:
Built-In Proactive Tuning System for Circuit Aging Resilience.
DFT 2008: 96-104 |
| 6 | EE | Rupak Samanta,
Jiang Hu,
Peng Li:
Discrete buffer and wire sizing for link-based non-tree clock networks.
ISPD 2008: 175-181 |
| 5 | EE | Rupak Samanta,
Ganesh Venkataraman,
Nimay Shah,
Jiang Hu:
Elastic Timing Scheme for Energy-Efficient and Robust Performance.
ISQED 2008: 537-542 |
| 4 | EE | Rupak Samanta,
Jason Surprise,
Rabi N. Mahapatra:
Dynamic Aggregation of Virtual Addresses in TLB Using TCAM Cells.
VLSI Design 2008: 243-248 |
| 2007 |
|---|
| 3 | EE | Cheng Zhuo,
Huafeng Zhang,
Rupak Samanta,
Jiang Hu,
Kangsheng Chen:
Modeling, optimization and control of rotary traveling-wave oscillator.
ICCAD 2007: 476-480 |
| 2 | EE | Rupak Samanta,
Rabi N. Mahapatra:
An Enhanced CAM Architecture to Accelerate LZW Compression Algorithm.
VLSI Design 2007: 824-829 |
| 2006 |
|---|
| 1 | EE | Rupak Samanta,
Ganesh Venkataraman,
Jiang Hu:
Clock buffer polarity assignment for power noise reduction.
ICCAD 2006: 558-562 |
