2008 |
11 | EE | Mehrdad Najibi,
Hossein Pedram:
Compensating Algorithmic-Loop Performance Degradation in Asynchronous Circuits Using Hardware Multi-threading.
ISVLSI 2008: 507-510 |
2007 |
10 | EE | Atabak Mahram,
Mehrdad Najibi,
Hossein Pedram:
An asynchronous fpga logic cell implementation.
ACM Great Lakes Symposium on VLSI 2007: 176-179 |
9 | EE | Mehrdad Najibi,
Kamran Saleh,
Hossein Pedram:
Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint.
ACM Great Lakes Symposium on VLSI 2007: 299-304 |
8 | EE | Mehrdad Najibi,
Mahtab Niknahad,
Hossein Pedram:
Performance Evaluation of Asynchronous Circuits with Choice Using Abstract Probabilistic Timed Petri Nets.
ISVLSI 2007: 422-427 |
7 | EE | Mahtab Niknahad,
Behnam Ghavami,
Mehrdad Najibi,
Hossein Pedram:
A Power Estimation Methodology for QDI Asynchronous Circuits based on High-Level Simulation.
ISVLSI 2007: 471-472 |
6 | EE | Behnam Ghavami,
Mahtab Niknahad,
Mehrdad Najibi,
Hossein Pedram:
A Fast and Accurate Power Estimation Methodology for QDI Asynchronous Circuits.
PATMOS 2007: 463-473 |
2006 |
5 | EE | Mehrdad Najibi,
M. Salehi,
Ali Afzali-Kusha,
Massoud Pedram,
Seid Mehdi Fakhraie,
Hossein Pedram:
Dynamic voltage and frequency management based on variable update intervals for frequency setting.
ICCAD 2006: 755-760 |
4 | EE | Esmail Amini,
Mehrdad Najibi,
Hossein Pedram:
Globally Asynchronous Locally Synchronous Wrapper Circuit based on Clock Gating.
ISVLSI 2006: 193-199 |
2005 |
3 | EE | Kamran Saleh,
Mehrdad Najibi,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach.
ACM Great Lakes Symposium on VLSI 2005: 296-301 |
2 | EE | Mehrdad Najibi,
Kamran Saleh,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only).
FPGA 2005: 269 |
1 | EE | Mehrdad Najibi,
Kamran Saleh,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs.
IEEE International Workshop on Rapid System Prototyping 2005: 63-69 |