| 2007 |
|---|
| 8 | EE | Paolo Meloni,
Giovanni Busonera,
Salvatore Carta,
Luigi Raffo:
On the impact of serialization on the cache performances in Network-on-Chip based MPSoCs.
DSD 2007: 556-562 |
| 7 | EE | Antonio Pullini,
Federico Angiolini,
Paolo Meloni,
David Atienza,
Srinivasan Murali,
Luigi Raffo,
Giovanni De Micheli,
Luca Benini:
NoC Design and Implementation in 65nm Technology.
NOCS 2007: 273-282 |
| 6 | EE | Srinivasan Murali,
David Atienza,
Paolo Meloni,
Salvatore Carta,
Luca Benini,
Giovanni De Micheli,
Luigi Raffo:
Synthesis of Predictable Networks-on-Chip-Based Interconnect Architectures for Chip Multiprocessors.
IEEE Trans. VLSI Syst. 15(8): 869-880 (2007) |
| 5 | EE | Federico Angiolini,
Paolo Meloni,
Salvatore Carta,
Luigi Raffo,
Luca Benini:
A Layout-Aware Analysis of Networks-on-Chip and Traditional Interconnects for MPSoCs.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(3): 421-434 (2007) |
| 2006 |
|---|
| 4 | EE | Federico Angiolini,
Paolo Meloni,
Salvatore Carta,
Luca Benini,
Luigi Raffo:
Contrasting a NoC and a traditional interconnect fabric with layout awareness.
DATE 2006: 124-129 |
| 3 | EE | Srinivasan Murali,
Paolo Meloni,
Federico Angiolini,
David Atienza,
Salvatore Carta,
Luca Benini,
Giovanni De Micheli,
Luigi Raffo:
Designing application-specific networks on chips with floorplan information.
ICCAD 2006: 355-362 |
| 2 | EE | Srinivasan Murali,
Paolo Meloni,
Federico Angiolini,
David Atienza,
Salvatore Carta,
Luca Benini,
Giovanni De Micheli,
Luigi Raffo:
Designing Message-Dependent Deadlock Free Networks on Chips for Application-Specific Systems on Chips.
VLSI-SoC 2006: 158-163 |
| 2005 |
|---|
| 1 | | Federico Angiolini,
Paolo Meloni,
Luca Benini,
Salvatore Carta,
Luigi Raffo:
Networks on Chips: A Synthesis Perspective.
PARCO 2005: 745-752 |
