| |
| 2007 | ||
|---|---|---|
| 4 | EE | Devang Jariwala, John Lillis: RBI: Simultaneous Placement and Routing Optimization Technique. IEEE Trans. on CAD of Integrated Circuits and Systems 26(1): 127-141 (2007) |
| 2006 | ||
| 3 | EE | Devang Jariwala, John Lillis: Trunk decomposition based global routing optimization. ICCAD 2006: 472-479 |
| 2005 | ||
| 2 | EE | Qingzhou (Ben) Wang, Devang Jariwala, John Lillis: A study of tighter lower bounds in LP relaxation based placement. ACM Great Lakes Symposium on VLSI 2005: 498-502 |
| 2004 | ||
| 1 | EE | Devang Jariwala, John Lillis: On interactions between routing and detailed placement. ICCAD 2004: 387-393 |
| 1 | John Lillis | [1] [2] [3] [4] |
| 2 | Qingzhou (Ben) Wang | [2] |