Habib Mehrez

2008
14	EE	Zied Marrakchi, Hayder Mrabet, Emna Amouri, Habib Mehrez: Efficient tree topology for FPGA interconnect network. ACM Great Lakes Symposium on VLSI 2008: 321-326
13	EE	Sophie Belloeil, Roselyne Chotin-Avot, Habib Mehrez: Arithmetic Data Path Optimization Using Borrow-Save Representation. ISVLSI 2008: 4-9
12	EE	Ana Abril, Habib Mehrez, Frédéric Pétrot, Jean Gobert, Carolina Miro: Estimation et optimisation de la consommation dans les SoC utilisant la simulation précise au cycle. Technique et Science Informatiques 27(1-2): 203-233 (2008)
2007
11	EE	Zied Marrakchi, Hayder Mrabet, Christian Masson, Habib Mehrez: Mesh of Tree: Unifying Mesh and MFPGA for Better Device Performances. NOCS 2007: 243-252
2006
10	EE	Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez: A multilevel hierarchical interconnection structure for FPGA. FPGA 2006: 225
9	EE	Zied Marrakchi, Hayder Mrabet, Habib Mehrez: Configuration tools for a new multilevel hierarchical FPGA. FPGA 2006: 229
8	EE	Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez: Performances improvement of FPGA using novel multilevel hierarchical interconnection structure. ICCAD 2006: 675-679
7	EE	Zied Marrakchi, Hayder Mrabet, Habib Mehrez: A new Multilevel Hierarchical MFPGA and its suitable configuration tools. ISVLSI 2006: 263-268
6		Hayder Mrabet, Zied Marrakchi, Pierre Souillot, Habib Mehrez, André Tissot: Performance Improvement of FPGA Using Novel Multilevel Hierarchical Interconnection Structure. ReCoSoC 2006: 117-123
2005
5		Hayder Mrabet, Zied Marrakchi, Habib Mehrez, André Tissot: Implementation of Scalable Embedded FPGA for SOC. ReCoSoC 2005: 59-62
2000
4	EE	M. Aberbour, Habib Mehrez, François Durbin, Jacques Haussy, P. Lalande, André Tissot: A System-On-A-Chip for Pattern Recognition Architecture and Design Methodology. CAMP 2000: 155-162
1998
3	EE	M. Aberbour, A. Houelle, Habib Mehrez, N. Vaucher, Alain Guyot: On portable macrocell FPU generators for division and square root operators complying to the full IEEE-754 standard. IEEE Trans. VLSI Syst. 6(1): 114-121 (1998)
1995
2	EE	A. Houelle, Habib Mehrez, N. Vaucher, Luis A. Montalvo, Alain Guyot: Application of fast layout synthesis environment to dividers evaluation. IEEE Symposium on Computer Arithmetic 1995: 67-74
1	EE	Alain Guyot, Luis A. Montalvo, A. Houelle, Habib Mehrez, N. Vaucher: Comparison of the layout synthesis of radix-2 and pseudo-radix-4 dividers. VLSI Design 1995: 386-391

Coauthor Index

1	M. Aberbour	[3] [4]
2	Ana Abril	[12]
3	Emna Amouri	[14]
4	Sophie Belloeil	[13]
5	Roselyne Chotin-Avot	[13]
6	François Durbin	[4]
7	Jean Gobert	[12]
8	Alain Guyot	[1] [2] [3]
9	Jacques Haussy	[4]
10	A. Houelle	[1] [2] [3]
11	P. Lalande	[4]
12	Zied Marrakchi	[5] [6] [7] [8] [9] [10] [11] [14]
13	Christian Masson	[11]
14	Carolina Miro	[12]
15	Luis A. Montalvo	[1] [2]
16	Hayder Mrabet	[5] [6] [7] [8] [9] [10] [11] [14]
17	Frédéric Pétrot	[12]
18	Pierre Souillot	[6] [8] [10]
19	André Tissot	[4] [5] [6]
20	N. Vaucher	[1] [2] [3]

Colors in the list of coauthors