| 2008 |
|---|
| 7 | EE | Sanjay V. Kumar,
Chandramouli V. Kashyap,
Sachin S. Sapatnekar:
A framework for block-based timing sensitivity analysis.
DAC 2008: 688-693 |
| 6 | EE | Yong Zhan,
Sanjay V. Kumar,
Sachin S. Sapatnekar:
Thermally Aware Design.
Foundations and Trends in Electronic Design Automation 2(3): 255-370 (2008) |
| 5 | EE | Sanjay V. Kumar,
Chris H. Kim,
Sachin S. Sapatnekar:
Body Bias Voltage Computations for Process and Temperature Compensation.
IEEE Trans. VLSI Syst. 16(3): 249-262 (2008) |
| 2007 |
|---|
| 4 | EE | Sanjay V. Kumar,
Chris H. Kim,
Sachin S. Sapatnekar:
NBTI-Aware Synthesis of Digital Circuits.
DAC 2007: 370-375 |
| 2006 |
|---|
| 3 | EE | Sanjay V. Kumar,
Chris H. Kim,
Sachin S. Sapatnekar:
Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems.
ASP-DAC 2006: 559-564 |
| 2 | EE | Sanjay V. Kumar,
Chris H. Kim,
Sachin S. Sapatnekar:
An analytical model for negative bias temperature instability.
ICCAD 2006: 493-496 |
| 1 | EE | Sanjay V. Kumar,
Chris H. Kim,
Sachin S. Sapatnekar:
Impact of NBTI on SRAM Read Stability and Design for Reliability.
ISQED 2006: 210-218 |
