2008 |
23 | EE | A. Kapoor,
Nikhil Jayakumar,
Sunil P. Khatri:
Dynamically De-Skewable Clock Distribution Methodology.
IEEE Trans. VLSI Syst. 16(9): 1220-1229 (2008) |
22 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri,
D. M. H. Walker:
A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations.
Integration 41(3): 399-412 (2008) |
2007 |
21 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
An algorithm to minimize leakage through simultaneous input vector control and circuit modification.
DATE 2007: 618-623 |
20 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
A Structured ASIC Design Approach Using Pass Transistor Logic.
ISCAS 2007: 1787-1790 |
19 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
A Predictably Low-Leakage ASIC Design Style.
IEEE Trans. VLSI Syst. 15(3): 276-285 (2007) |
18 | EE | Vijay Nagarajan,
Stefan Laendner,
Nikhil Jayakumar,
Olgica Milenkovic,
Sunil P. Khatri:
High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems.
VLSI Signal Processing 49(1): 185-206 (2007) |
2006 |
17 | EE | Rajesh Garg,
Mario Sanchez,
Kanupriya Gulati,
Nikhil Jayakumar,
Anshul Gupta,
Sunil P. Khatri:
A design flow to optimize circuit delay by using standard cells and PLAs.
ACM Great Lakes Symposium on VLSI 2006: 217-222 |
16 | EE | Nikhil Jayakumar,
Rajesh Garg,
Bruce Gamache,
Sunil P. Khatri:
A PLA based asynchronous micropipelining approach for subthreshold circuit design.
DAC 2006: 419-424 |
15 | EE | Rajesh Garg,
Nikhil Jayakumar,
Sunil P. Khatri,
Gwan Choi:
A design approach for radiation-hard digital electronics.
DAC 2006: 773-778 |
14 | EE | Nikhil Jayakumar,
Sunil P. Khatri,
Kanupriya Gulati,
Alexander Sprintson:
Network coding for routability improvement in VLSI.
ICCAD 2006: 820-823 |
13 | EE | Rajesh Garg,
Nikhil Jayakumar,
Sunil P. Khatri:
On the Improvement of Statistical Static Timing Analysis.
ICCD 2006 |
12 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
A probabilistic method to determine the minimum leakage vector for combinational designs.
ISCAS 2006 |
2005 |
11 | EE | Nikhil Jayakumar,
Sandeep Dhar,
Sunil P. Khatri:
A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents.
DAC 2005: 43-46 |
10 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
A variation tolerant subthreshold design approach.
DAC 2005: 716-719 |
9 | | Ganesh Venkataraman,
Nikhil Jayakumar,
Jiang Hu,
Peng Li,
Sunil P. Khatri,
Anand Rajaram,
Patrick McGuinness,
Charles J. Alpert:
Practical techniques to reduce skew and its variations in buffered clock networks.
ICCAD 2005: 592-596 |
8 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
Minimum Energy Near-threshold Network of PLA based Design.
ICCD 2005: 399-404 |
7 | EE | Seraj Ahmad,
Nikhil Jayakumar,
Vijay Balasubramanian,
Edward Hursey,
Sunil P. Khatri,
Rabi N. Mahapatra:
X-Routing using Two Manhattan Route Instances.
ICCD 2005: 45-52 |
6 | EE | Kanupriya Gulati,
Nikhil Jayakumar,
Sunil P. Khatri:
An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs.
ISLPED 2005: 111-114 |
5 | EE | Edward Hursey,
Nikhil Jayakumar,
Sunil P. Khatri:
Non-Manhattan Routing Using a Manhattan Router.
VLSI Design 2005: 445-450 |
2004 |
4 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
A metal and via maskset programmable VLSI design methodology using PLAs.
ICCAD 2004: 590-594 |
3 | EE | A. Kapoor,
Nikhil Jayakumar,
Sunil P. Khatri:
A novel clock distribution and dynamic de-skewing methodology.
ICCAD 2004: 626-631 |
2003 |
2 | EE | Nikhil Jayakumar,
Mitra Purandare,
Fabio Somenzi:
Dos and don'ts of CTL state coverage estimation.
DAC 2003: 292-295 |
1 | EE | Nikhil Jayakumar,
Sunil P. Khatri:
An ASIC design methodology with predictably low leakage, using leakage-immune standard cells.
ISLPED 2003: 128-133 |