2008 |
25 | EE | Gennette Gill,
Vishal Gupta,
Montek Singh:
Performance estimation and slack matching for pipelined asynchronous architectures with choice.
ICCAD 2008: 449-456 |
24 | EE | Jeff Pool,
Anselmo Lastra,
Montek Singh:
Energy-precision tradeoffs in mobile Graphics Processing Units.
ICCD 2008: 60-67 |
2007 |
23 | EE | Montek Singh,
Steven M. Nowick:
The Design of High-Performance Dynamic Asynchronous Pipelines: Lookahead Style.
IEEE Trans. VLSI Syst. 15(11): 1256-1269 (2007) |
22 | EE | Montek Singh,
Steven M. Nowick:
The Design of High-Performance Dynamic Asynchronous Pipelines: High-Capacity Style.
IEEE Trans. VLSI Syst. 15(11): 1270-1283 (2007) |
21 | EE | Montek Singh,
Steven M. Nowick:
MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines.
IEEE Trans. VLSI Syst. 15(6): 684-698 (2007) |
2006 |
20 | EE | Gennette Gill,
Ankur Agiwal,
Montek Singh,
Feng Shi,
Yiorgos Makris:
Low-Overhead Testing of Delay Faults in High-Speed Asynchronous Pipelines.
ASYNC 2006: 46-56 |
19 | EE | Gennette Gill,
John Hansen,
Montek Singh:
Loop pipelining for high-throughput stream computation using self-timed rings.
ICCAD 2006: 289-296 |
18 | EE | Manoj Ampalam,
Montek Singh:
Counterflow pipelining: architectural support for preemption in asynchronous systems using anti-tokens.
ICCAD 2006: 611-618 |
17 | EE | Ken S. Stevens,
Sandeep K. Shukla,
Montek Singh,
Jean-Pierre Talpin:
Preface.
Electr. Notes Theor. Comput. Sci. 146(2): 1-3 (2006) |
16 | EE | Ankur Agiwal,
Montek Singh:
Multi-Clock Latency-Insensitive Architecture and Wrapper Synthesis.
Electr. Notes Theor. Comput. Sci. 146(2): 5-28 (2006) |
2005 |
15 | EE | Justin Hensley,
Anselmo Lastra,
Montek Singh:
A Scalable Counterflow-Pipelined Asynchronous Radix-4 Booth Multiplier.
ASYNC 2005: 128-137 |
14 | EE | Justin Hensley,
Montek Singh,
Anselmo Lastra:
A fast, energy-efficient z-comparator.
Graphics Hardware 2005: 41-44 |
13 | | Ankur Agiwal,
Montek Singh:
An architecture and a wrapper synthesis approach for multi-clock latency-insensitive systems.
ICCAD 2005: 1006-1013 |
12 | | Montek Singh:
Memory access optimization of dynamic binary translation for reconfigurable architectures.
ICCAD 2005: 1014-1020 |
11 | EE | Justin Hensley,
Thorsten Scheuermann,
Greg Coombe,
Montek Singh,
Anselmo Lastra:
Fast Summed-Area Table Generation and its Applications.
Comput. Graph. Forum 24(3): 547-555 (2005) |
2004 |
10 | EE | Montek Singh,
Michael Theobald:
Generalized Latency-Insensitive Systems for Single-Clock and Multi-Clock Architectures.
DATE 2004: 1008-1013 |
9 | EE | Justin Hensley,
Anselmo Lastra,
Montek Singh:
An Area- and Energy-Efficient Asynchronous Booth Multiplier for Mobile Devices.
ICCD 2004: 18-25 |
2002 |
8 | EE | José A. Tierno,
Sergey Rylov,
Alexander Rylyakov,
Montek Singh,
Steven M. Nowick:
An Adaptively-Pipelined Mixed Synchronous-Asynchronous Digital FIR Filter Chip Operating at 1.3 GigaHertz.
ASYNC 2002: 84- |
7 | EE | Recep O. Ozdag,
Peter A. Beerel,
Montek Singh,
Steven M. Nowick:
High-Speed Non-Linear Asynchronous Pipelines.
DATE 2002: 1000-1007 |
2001 |
6 | | Montek Singh,
Steven M. Nowick:
MOUSETRAP: Ultra-High-Speed Transition-Signaling Asynchronous Pipelines.
ICCD 2001: 9-17 |
2000 |
5 | EE | Montek Singh,
Steven M. Nowick:
High-Throughput Asynchronous Pipelines for Fine-Grain Dynamic Datapaths.
ASYNC 2000: 198- |
4 | EE | Montek Singh,
Steven M. Nowick:
Synthesis for logical initializability of synchronous finite-state machines.
IEEE Trans. VLSI Syst. 8(5): 542-557 (2000) |
1997 |
3 | EE | Montek Singh,
Steven M. Nowick:
Synthesis for Logical Initializability of Synchronous Finite State Machines.
VLSI Design 1997: 76-81 |
2 | EE | Montek Singh,
Amitabha Chatterjee,
Santanu Chaudhury:
Matching structural shape descriptions using genetic algorithms.
Pattern Recognition 30(9): 1451-1462 (1997) |
1996 |
1 | | Montek Singh,
Steven M. Nowick:
Synthesis-for-Initializability of Asynchronous Sequential Machines.
ITC 1996: 232-241 |