2009 |
18 | EE | Minsik Cho,
Katrina Lu,
Kun Yuan,
David Z. Pan:
BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability.
ACM Trans. Design Autom. Electr. Syst. 14(2): (2009) |
2008 |
17 | EE | David Z. Pan,
Minsik Cho:
Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond.
ASP-DAC 2008: 220-225 |
16 | EE | Minsik Cho,
Kun Yuan,
Yongchan Ban,
David Z. Pan:
ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction.
DAC 2008: 504-509 |
15 | EE | Minsik Cho,
Yongchan Ban,
David Z. Pan:
Double patterning technology friendly detailed routing.
ICCAD 2008: 506-511 |
14 | EE | Minsik Cho,
David Z. Pan:
A high-performance droplet router for digital microfluidic biochips.
ISPD 2008: 200-206 |
13 | EE | Tung-Chieh Chen,
Minsik Cho,
David Z. Pan,
Yao-Wen Chang:
Metal-density driven placement for cmp variation and routability.
ISPD 2008: 31-38 |
12 | EE | Minsik Cho,
David Z. Pan:
Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs.
IEEE Trans. VLSI Syst. 16(12): 1713-1717 (2008) |
11 | EE | Minsik Cho,
David Z. Pan:
A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1714-1724 (2008) |
10 | EE | Tung-Chieh Chen,
Minsik Cho,
David Z. Pan,
Yao-Wen Chang:
Metal-Density-Driven Placement for CMP Variation and Routability.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2145-2155 (2008) |
9 | EE | Minsik Cho,
Hua Xiang,
Ruchir Puri,
David Z. Pan:
Track Routing and Optimization for Yield.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 872-882 (2008) |
2007 |
8 | EE | Minsik Cho,
Hua Xiang,
Ruchir Puri,
David Z. Pan:
TROY: Track Router with Yield-driven Wire Planning.
DAC 2007: 55-58 |
7 | EE | Minsik Cho,
Katrina Lu,
Kun Yuan,
David Z. Pan:
BoxRouter 2.0: architecture and implementation of a hybrid and robust global router.
ICCAD 2007: 503-508 |
6 | EE | Minsik Cho,
David Z. Pan:
BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP.
IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2130-2143 (2007) |
2006 |
5 | EE | Minsik Cho,
Hongjoong Shin,
David Z. Pan:
Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs.
ASP-DAC 2006: 765-770 |
4 | EE | Minsik Cho,
David Z. Pan:
BoxRouter: a new global router based on box expansion and progressive ILP.
DAC 2006: 373-378 |
3 | EE | Minsik Cho,
David Z. Pan,
Hua Xiang,
Ruchir Puri:
Wire density driven global routing for CMP variation and timing.
ICCAD 2006: 487-492 |
2 | EE | Minsik Cho,
David Z. Pan:
PEAKASO: Peak-Temperature Aware Scan-Vector Optimization.
VTS 2006: 52-57 |
2005 |
1 | | Minsik Cho,
Suhail Ahmed,
David Z. Pan:
TACO: temperature aware clock-tree optimization.
ICCAD 2005: 582-587 |