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Minsik Cho

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2009
18EEMinsik Cho, Katrina Lu, Kun Yuan, David Z. Pan: BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability. ACM Trans. Design Autom. Electr. Syst. 14(2): (2009)
2008
17EEDavid Z. Pan, Minsik Cho: Synergistic physical synthesis for manufacturability and variability in 45nm designs and beyond. ASP-DAC 2008: 220-225
16EEMinsik Cho, Kun Yuan, Yongchan Ban, David Z. Pan: ELIAD: efficient lithography aware detailed router with compact post-OPC printability prediction. DAC 2008: 504-509
15EEMinsik Cho, Yongchan Ban, David Z. Pan: Double patterning technology friendly detailed routing. ICCAD 2008: 506-511
14EEMinsik Cho, David Z. Pan: A high-performance droplet router for digital microfluidic biochips. ISPD 2008: 200-206
13EETung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen Chang: Metal-density driven placement for cmp variation and routability. ISPD 2008: 31-38
12EEMinsik Cho, David Z. Pan: Fast Substrate Noise Aware Floorplanning for Mixed Signal SOC Designs. IEEE Trans. VLSI Syst. 16(12): 1713-1717 (2008)
11EEMinsik Cho, David Z. Pan: A High-Performance Droplet Routing Algorithm for Digital Microfluidic Biochips. IEEE Trans. on CAD of Integrated Circuits and Systems 27(10): 1714-1724 (2008)
10EETung-Chieh Chen, Minsik Cho, David Z. Pan, Yao-Wen Chang: Metal-Density-Driven Placement for CMP Variation and Routability. IEEE Trans. on CAD of Integrated Circuits and Systems 27(12): 2145-2155 (2008)
9EEMinsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan: Track Routing and Optimization for Yield. IEEE Trans. on CAD of Integrated Circuits and Systems 27(5): 872-882 (2008)
2007
8EEMinsik Cho, Hua Xiang, Ruchir Puri, David Z. Pan: TROY: Track Router with Yield-driven Wire Planning. DAC 2007: 55-58
7EEMinsik Cho, Katrina Lu, Kun Yuan, David Z. Pan: BoxRouter 2.0: architecture and implementation of a hybrid and robust global router. ICCAD 2007: 503-508
6EEMinsik Cho, David Z. Pan: BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP. IEEE Trans. on CAD of Integrated Circuits and Systems 26(12): 2130-2143 (2007)
2006
5EEMinsik Cho, Hongjoong Shin, David Z. Pan: Fast substrate noise-aware floorplanning with preference directed graph for mixed-signal SOCs. ASP-DAC 2006: 765-770
4EEMinsik Cho, David Z. Pan: BoxRouter: a new global router based on box expansion and progressive ILP. DAC 2006: 373-378
3EEMinsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri: Wire density driven global routing for CMP variation and timing. ICCAD 2006: 487-492
2EEMinsik Cho, David Z. Pan: PEAKASO: Peak-Temperature Aware Scan-Vector Optimization. VTS 2006: 52-57
2005
1 Minsik Cho, Suhail Ahmed, David Z. Pan: TACO: temperature aware clock-tree optimization. ICCAD 2005: 582-587

Coauthor Index

1Suhail Ahmed [1]
2Yongchan Ban [15] [16]
3Yao-Wen Chang [10] [13]
4Tung-Chieh Chen [10] [13]
5Katrina Lu [7] [18]
6David Z. Pan (David Zhigang Pan) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18]
7Ruchir Puri [3] [8] [9]
8Hongjoong Shin [5]
9Hua Xiang [3] [8] [9]
10Kun Yuan [7] [16] [18]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)