| 2006 |
|---|
| 5 | EE | Leonard Lee,
Li-C. Wang:
On bounding the delay of a critical path.
ICCAD 2006: 81-88 |
| 2005 |
|---|
| 4 | EE | Leonard Lee,
Sean Wu,
Charles H.-P. Wen,
Li-C. Wang:
On Generating Tests to Cover Diverse Worst-Case Timing Corners.
DFT 2005: 415-426 |
| 3 | EE | Leonard Lee,
Li-C. Wang,
Praveen Parvathala,
T. M. Mak:
On Silicon-Based Speed Path Identification.
VTS 2005: 35-41 |
| 2004 |
|---|
| 2 | EE | Leonard Lee,
Li-C. Wang,
T. M. Mak,
Kwang-Ting Cheng:
A path-based methodology for post-silicon timing validation.
ICCAD 2004: 713-720 |
| 2003 |
|---|
| 1 | EE | Li-C. Wang,
Angela Krstic,
Leonard Lee,
Kwang-Ting Cheng,
M. Ray Mercer,
Thomas W. Williams,
Magdy S. Abadir:
Using Logic Models To Predict The Detection Behavior Of Statistical Timing Defects.
ITC 2003: 1041-1050 |
