| 2008 |
|---|
| 8 | EE | Sarvesh H. Kulkarni,
D. M. Sylvester,
David T. Blaauw:
Design-Time Optimization of Post-Silicon Tuned Circuits Using Adaptive Body Bias.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(3): 481-494 (2008) |
| 2006 |
|---|
| 7 | EE | Sarvesh H. Kulkarni,
Dennis Sylvester:
Power distribution techniques for dual VDD circuits.
ASP-DAC 2006: 838-843 |
| 6 | EE | Sarvesh H. Kulkarni,
Dennis Sylvester,
David Blaauw:
A statistical framework for post-silicon tuning through body bias clustering.
ICCAD 2006: 39-46 |
| 5 | EE | Sarvesh H. Kulkarni,
Dennis Sylvester:
Power Distribution Techniques for Dual VDD Circuits.
J. Low Power Electronics 2(2): 217-229 (2006) |
| 2004 |
|---|
| 4 | EE | Sarvesh H. Kulkarni,
Ashish Srivastava,
Dennis Sylvester:
A new algorithm for improved VDD assignment in low power dual VDD systems.
ISLPED 2004: 200-205 |
| 3 | EE | Sarvesh H. Kulkarni,
Dennis Sylvester:
High performance level conversion for dual VDD design.
IEEE Trans. VLSI Syst. 12(9): 926-936 (2004) |
| 2003 |
|---|
| 2 | EE | Ruchir Puri,
Leon Stok,
John M. Cohn,
David S. Kung,
David Z. Pan,
Dennis Sylvester,
Ashish Srivastava,
Sarvesh H. Kulkarni:
Pushing ASIC performance in a power envelope.
DAC 2003: 788-793 |
| 1 | EE | Robert Bai,
Sarvesh H. Kulkarni,
Wesley Kwong,
Ashish Srivastava,
Dennis Sylvester,
David Blaauw:
An Implementation of a 32-bit ARM Processor Using Dual Power Supplies and Dual Threshold Voltages.
ISVLSI 2003: 149-154 |
