| 2003 |
|---|
| 13 | EE | Yu-Liang Wu,
Chak-Chung Cheung,
David Ihsin Cheng,
Hongbing Fan:
Further improve circuit partitioning using GBAW logic perturbation techniques.
IEEE Trans. VLSI Syst. 11(3): 451-460 (2003) |
| 2001 |
|---|
| 12 | EE | Chak-Chung Cheung,
Yu-Liang Wu,
David Ihsin Cheng:
Further improve circuit partitioning using GBAW logic perturbation techniques.
DATE 2001: 233-239 |
| 2000 |
|---|
| 11 | EE | Yu-Liang Wu,
Xiao-Long Yuan,
David Ihsin Cheng:
Circuit partitioning with coupled logic restructuring techniques.
ASP-DAC 2000: 655-660 |
| 1999 |
|---|
| 10 | EE | Shih-Chieh Chang,
David Ihsin Cheng:
Efficient Boolean division and substitution using redundancy addition and removing.
IEEE Trans. on CAD of Integrated Circuits and Systems 18(8): 1096-1106 (1999) |
| 1998 |
|---|
| 9 | EE | Shih-Chieh Chang,
David Ihsin Cheng:
Efficient Boolean Division and Substitution.
DAC 1998: 342-347 |
| 8 | EE | David Ihsin Cheng:
On Removing Multiple Redundancies in Combinational Circuits.
DATE 1998: 738-742 |
| 7 | EE | David Ihsin Cheng,
Kwang-Ting Cheng,
Deborah C. Wang,
Malgorzata Marek-Sadowska:
A hybrid methodology for switching activities estimation.
IEEE Trans. on CAD of Integrated Circuits and Systems 17(4): 357-366 (1998) |
| 1997 |
|---|
| 6 | | Shi-Yu Huang,
Kwang-Ting Cheng,
Kuang-Chien Chen,
David Ihsin Cheng:
Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis.
ITC 1997: 974-981 |
| 1996 |
|---|
| 5 | EE | David Ihsin Cheng,
Kwang-Ting Cheng,
Deborah C. Wang,
Malgorzata Marek-Sadowska:
A New Hybrid Methodology for Power Estimation.
DAC 1996: 439-444 |
| 1995 |
|---|
| 4 | EE | Chih-Chang Lin,
David Ihsin Cheng,
Malgorzata Marek-Sadowska,
Kuang-Chien Chen:
Logic rectification and synthesis for engineering change.
ASP-DAC 1995 |
| 3 | EE | David Ihsin Cheng,
Chih-Chang Lin,
Malgorzata Marek-Sadowska:
Circuit partitioning with logic perturbation.
ICCAD 1995: 650-655 |
| 1994 |
|---|
| 2 | EE | Andreas Kuehlmann,
David Ihsin Cheng,
Arvind Srinivasan,
David P. LaPotin:
Error Diagnosis for Transistor-Level Verification.
DAC 1994: 218-224 |
| 1 | | Shih-Chieh Chang,
David Ihsin Cheng,
Malgorzata Marek-Sadowska:
Minimizing ROBDD Size of Incompletely Specified Multiple Output Functions.
EDAC-ETC-EUROASIC 1994: 620-624 |
