Shi-Yu Huang

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36EEChao-Wen Tzeng, Jheng-Syun Yang, Shi-Yu Huang: A versatile paradigm for scan chain diagnosis of complex faults using signal processing techniques. ACM Trans. Design Autom. Electr. Syst. 13(1): (2008)
35EEChao-Wen Tzeng, Shi-Yu Huang: UMC-Scan Test Methodology: Exploiting the Maximum Freedom of Multicasting. IEEE Design & Test of Computers 25(2): 132-140 (2008)
34EEChia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang: RT-level vector selection for realistic peak power simulation. ACM Great Lakes Symposium on VLSI 2007: 576-581
33EEChen-Hsing Wang, Chih-Yen Lo, Min-Sheng Lee, Jen-Chieh Yeh, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang: A network security processor design based on an integrated SOC design and test platform. DAC 2006: 490-495
32EEYu-Chiun Lin, Shi-Yu Huang: Accurate Whole-Chip Diagnostic Strategy for Scan Designs with Multiple Faults. J. Electronic Testing 22(2): 151-159 (2006)
31EEYen-Fong Lee, Shi-Yu Huang, Sheng-Yu Hsu, I-Ling Chen, Cheng-Tao Shieh, Jian-Cheng Lin, Shih-Chieh Chang: Power estimation starategies for a low-power security processor. ASP-DAC 2005: 367-371
30EEJheng-Syun Yang, Shi-Yu Huang: Quick Scan Chain Diagnosis Using Signal Profiling. ICCD 2005: 157-160
29EEShi-Yu Huang: A Fading Algorithm For Sequential Fault Diagnosis. DFT 2004: 139-147
28EEYu-Chiun Lin, Shi-Yu Huang: Chip-Level Diagnostic Strategy for Full-Scan Designs with Multiple Faults. Asian Test Symposium 2003: 38-43
27EEMingHung Lee, TingTing Hwang, Shi-Yu Huang: Decomposition of Extended Finite State Machine for Low Power Design. DATE 2003: 11152-11153
26EEShyue-Kung Lu, Jian-Long Chen, Cheng-Wen Wu, Ken-Feng Chang, Shi-Yu Huang: Combinational circuit fault diagnosis using logic emulation. ISCAS (5) 2003: 549-552
25EEShi-Yu Huang: A Symbolic Inject-and-Evaluate Paradigm for Byzantine Fault Diagnosis. J. Electronic Testing 19(2): 161-172 (2003)
24EEHong-Chou Kao, Ming-Fu Tsai, Shi-Yu Huang, Cheng-Wen Wu, Wen-Feng Chang, Shyue-Kung Lu: Efficient Double Fault Diagnosis for CMOS Logic Circuits With a Specific Application to Generic Bridging Faults. J. Inf. Sci. Eng. 19(4): 571-587 (2003)
23EEShi-Yu Huang: Diagnosis Of Byzantine Open-Segment Faults. Asian Test Symposium 2002: 248-
22EEHorng-Bin Wang, Shi-Yu Huang, Jing-Reng Huang: Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm. DFT 2002: 117-128
21EEShi-Yu Huang: Speeding Up The Byzantine Fault Diagnosis Using Symbolic Simulation. VTS 2002: 193-200
20EEShi-Yu Huang: Towards the logic defect diagnosis for partial-scan designs. ASP-DAC 2001: 313-318
19EEShi-Yu Huang: On speeding up extended finite state machines using catalyst circuitry. ASP-DAC 2001: 583-588
18EEChih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang, Shyh-Horng Lin, Hsin-Po Wang: A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. Asian Test Symposium 2001: 103-
17EEShi-Yu Huang: On Improving the Accuracy Of Multiple Defect Diagnosis. VTS 2001: 34-41
16EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen: Verifying sequential equivalence using ATPG techniques. ACM Trans. Design Autom. Electr. Syst. 6(2): 244-275 (2001)
15EEShi-Yu Huang, Sudhakar M. Reddy: High Performance/Delay Testing. Asian Test Symposium 2000: 490-
14EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer: AQUILA: An Equivalence Checking System for Large Sequential Designs. IEEE Trans. Computers 49(5): 443-464 (2000)
13EEKwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai: Fault emulation: A new methodology for fault grading. IEEE Trans. on CAD of Integrated Circuits and Systems 18(10): 1487-1495 (1999)
12EEShi-Yu Huang, Kwang-Ting Cheng: ErrorTracer: design error diagnosis based on fault simulation techniques. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1341-1352 (1999)
11EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: AutoFix: a hybrid tool for automatic logic rectification. IEEE Trans. on CAD of Integrated Circuits and Systems 18(9): 1376-1384 (1999)
10 Yi-Min Jiang, Shi-Yu Huang, Kwang-Ting Cheng, Deborah C. Wang, ChingYen Ho: A Hybrid Power Model for RTL Power Estimation. ASP-DAC 1998: 551-556
9EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Juin-Yeu Joseph Lu: Fault-Simulation Based Design Error Diagnosis for Sequential Circuits. DAC 1998: 632-637
8 Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, David Ihsin Cheng: Error Tracer: A Fault-Simualtion-Based Approach to Design Error Diagnosis. ITC 1997: 974-981
7EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: Incremental logic rectification. VTS 1997: 143-149
6EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng, Tien-Chien Lee: Compact Vector Generation for Accurate Power Simulation. DAC 1996: 161-164
5EEShi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng: Error Correction Based on Verification Techniques. DAC 1996: 258-261
4EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen: On Verifying the Correctness of Retimed Circuits. Great Lakes Symposium on VLSI 1996: 277-
3EEShi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Mike Tien-Chien Lee: A novel methodology for transistor-level power estimation. ISLPED 1996: 67-72
2 Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Uwe Gläser: An ATPG-Based Framework for Verifying Sequential Equivalence. ITC 1996: 865-874
1EEKwang-Ting Cheng, Shi-Yu Huang, Wei-Jin Dai: Fault emulation: a new approach to fault grading. ICCAD 1995: 681-686

Coauthor Index

1Forrest Brewer [14]
2Ken-Feng Chang [26]
3Shih-Chieh Chang [31]
4Wen-Feng Chang [24]
5I-Ling Chen [31]
6Jian-Long Chen [26]
7Kuang-Chien Chen [2] [3] [4] [5] [6] [7] [8] [9] [11] [14] [16]
8David Ihsin Cheng [8]
9Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng) [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [16]
10Wei-Jin Dai [1] [13]
11Uwe Gläser [2]
12ChingYen Ho [10]
13Sheng-Yu Hsu [31]
14Chih-Tsun Huang [18] [33]
15Chung-Yang Huang [14]
16Jing-Reng Huang [22]
17TingTing Hwang [27]
18Yi-Min Jiang [10]
19Hong-Chou Kao [24]
20Mike Tien-Chien Lee [3]
21Min-Sheng Lee [33]
22MingHung Lee [27]
23Tien-Chien Lee [6]
24Yen-Fong Lee [31]
25Jian-Cheng Lin [31]
26Shyh-Horng Lin [18]
27Yu-Chiun Lin [28] [32]
28Chih-Yen Lo [33]
29Juin-Yeu Joseph Lu [9]
30Shyue-Kung Lu [24] [26]
31Sudhakar M. Reddy [15]
32Cheng-Tao Shieh [31]
33Ming-Fu Tsai [24]
34Chao-Wen Tzeng [35] [36]
35Ruey-Shing Tzeng [18]
36Chen-Hsing Wang [33]
37Chih-Wea Wang [18]
38Deborah C. Wang [10]
39Horng-Bin Wang [22]
40Hsin-Po Wang [18]
41Chia-Chien Weng [34]
42Cheng-Wen Wu [18] [24] [26] [33]
43Chi-Feng Wu [18]
44Ching-Shang Yang [34]
45Jheng-Syun Yang [30] [36]
46Jen-Chieh Yeh [33]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)