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VTS 1999: San Diego, CA, USA

17th IEEE VLSI Test Symposium (VTS '99), 25-30 April 1999, San Diego, CA, USA. IEEE Computer Society 1999, ISBN 0-7695-0146-X BibTeX

Keynote Address

Invited Presentation

Testing High-Speed and Dynamic Circuits

Core Testing


Techniques for the Very-Deep Submicron

Advanced Scan Path Techniques

IDDQ Testing

Delay Fault Testing

Validation, Verification, and Diagnosis

Mixed Signal Testing


ATPG Related Approaches

Testing MEMS, MCM and Analog Circuits

Mixed Signal BIST

High-Level Test Techniques

Concurrent Checking

Memory Test: Moderators

BIST Related Approaches

Defect Oriented Test

On-Line Testing and Fault Tolerance

DFT and Boundary Scan

Copyright © Sat May 16 23:47:02 2009 by Michael Ley (ley@uni-trier.de)