Volume 11,
Number 1,
August 1997
- Vishwani D. Agrawal:
Editorial.
5
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- K.-T. Cheng, Kewal K. Saluja, Hans-Joachim Wunderlich:
Guest Editorial.
7-8
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- Joan Carletta, Christos A. Papachristou:
Behavioral Testability Insertion for Datapath/Controller Circuits.
9-28
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- Marie-Lise Flottes, D. Hammad, Bruno Rouzeyre:
Improving Testability of Non-Scan Designs during Behavioral Synthesis.
29-42
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- Angela Krstic, Kwang-Ting Cheng:
Resynthesis of Combinational Circuits for Path Count Reduction and for Path Delay Fault Testability.
43-54
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- Marwan A. Gharaybeh, Michael L. Bushnell, Vishwani D. Agrawal:
Classification and Test Generation for Path-Delay Faults Using Single Struck-at Fault Tests.
55-67
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- Albrecht P. Stroele:
BIST Pattern Generators Using Addition and Subtraction Operations.
69-80
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- Hiroyuki Yotsuyanagi, Seiji Kajihara, Kozo Kinoshita:
Synthesis of Sequential Circuits by Redundancy Removal and Retiming.
81-92
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- Frank F. Hsu, Janak H. Patel:
Design for Testability Using State Distances.
93-100
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Volume 11,
Number 2,
October 1997
Volume 11,
Number 3,
December 1997
Copyright © Sat May 16 23:58:51 2009
by Michael Ley (ley@uni-trier.de)
