2009 |
14 | EE | Koji Yamazaki,
Toshiyuki Tsutsumi,
Hiroshi Takahashi,
Yoshinobu Higami,
Takashi Aikyo,
Yuzo Takamatsu,
Hiroyuki Yotsuyanagi,
Masaki Hashizume:
A Novel Approach for Improving the Quality of Open Fault Diagnosis.
VLSI Design 2009: 85-90 |
13 | EE | Hiroyuki Yotsuyanagi,
Masaki Hashizume,
Toshiyuki Tsutsumi,
Koji Yamazaki,
Takashi Aikyo,
Yoshinobu Higami,
Hiroshi Takahashi,
Yuzo Takamatsu:
Fault Effect of Open Faults Considering Adjacent Signal Lines in a 90 nm IC.
VLSI Design 2009: 91-96 |
2008 |
12 | EE | Kohei Miyase,
Kenji Noda,
Hideaki Ito,
Kazumi Hatayama,
Takashi Aikyo,
Yuta Yamato,
Hiroshi Furukawa,
Xiaoqing Wen,
Seiji Kajihara:
Effective IR-drop reduction in at-speed scan testing using Distribution-Controlling X-Identification.
ICCAD 2008: 52-58 |
11 | EE | Yuzo Takamatsu,
Hiroshi Takahashi,
Yoshinobu Higami,
Takashi Aikyo,
Koji Yamazaki:
Fault Diagnosis on Multiple Fault Models by Using Pass/Fail Information.
IEICE Transactions 91-D(3): 675-682 (2008) |
10 | EE | Masayuki Arai,
Satoshi Fukumoto,
Kazuhiko Iwasaki,
Tatsuru Matsuo,
Takahisa Hiraide,
Hideaki Konishi,
Michiaki Emori,
Takashi Aikyo:
Test Data Compression for Scan-Based BIST Aiming at 100x Compression Rate.
IEICE Transactions 91-D(3): 726-735 (2008) |
9 | EE | Hiroshi Takahashi,
Yoshinobu Higami,
Shuhei Kadoyama,
Yuzo Takamatsu,
Koji Yamazaki,
Takashi Aikyo,
Yasuo Sato:
Post-BIST Fault Diagnosis for Multiple Faults.
IEICE Transactions 91-D(3): 771-775 (2008) |
2007 |
8 | EE | Takashi Aikyo,
Hiroshi Takahashi,
Yoshinobu Higami,
Junichi Ootsu,
Kyohei Ono,
Yuzo Takamatsu:
Timing-Aware Diagnosis for Small Delay Defects.
DFT 2007: 223-234 |
7 | EE | Hiroshi Takahashi,
Yoshinobu Higami,
Toru Kikkawa,
Takashi Aikyo,
Yuzo Takamatsu,
Hiroyuki Yotsuyanagi,
Masaki Hashizume:
Test Generation and Diagnostic Test Generation for Open Faults with Considering Adjacent Lines.
DFT 2007: 243-251 |
6 | EE | Seiji Kajihara,
Shohei Morishima,
Masahiro Yamamoto,
Xiaoqing Wen,
Masayasu Fukunaga,
Kazumi Hatayama,
Takashi Aikyo:
Estimation of delay test quality and its application to test generation.
ICCAD 2007: 413-417 |
2006 |
5 | EE | Hiroshi Takahashi,
Shuhei Kadoyama,
Yoshinobu Higami,
Yuzo Takamatsu,
Koji Yamazaki,
Takashi Aikyo,
Yasuo Sato:
Effective Post-BIST Fault Diagnosis for Multiple Faults.
DFT 2006: 401-109 |
2000 |
4 | EE | Takashi Aikyo:
Issues on SOC testing in DSM area: embedded tutorial.
ASP-DAC 2000: 515-516 |
1997 |
3 | EE | Michiaki Emori,
Junko Kumagai,
Koichi Itaya,
Takashi Aikyo,
Tomoko Anan,
Junichi Niimi:
ATREX : Design for Testability System for Mega Gate LSIs.
Asian Test Symposium 1997: 126- |
2 | EE | Douglas Chang,
Mike Tien-Chien Lee,
Malgorzata Marek-Sadowska,
Takashi Aikyo,
Kwang-Ting Cheng:
A Test Synthesis Approach to Reducing BALLAST DFT Overhead.
DAC 1997: 466-471 |
1986 |
1 | | Takashi Aikyo,
Y. Hatano,
J. Ishii,
N. Karasawa,
S. Fujii:
An Automatic Test Generation System for Large Scale Gate Arrays.
COMPCON 1986: 445-451 |