ICCAD 1993:
Santa Clara,
California,
USA
Michael R. Lightner, Jochen A. G. Jess (Eds.):
Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 1993.
IEEE Computer Society 1993, ISBN 0-8186-4490-7 BibTeX
- Mehrdad Mojtahedi, Walter Geisselhardt:
New methods for parallel pattern fast fault simulation for synchronous sequential circuits.
2-5
Electronic Edition (ACM DL) BibTeX
- Gwan S. Choi, Ravishankar K. Iyer, Daniel G. Saab:
Fault behavior dictionary for simulation of device-level transients.
6-9
Electronic Edition (ACM DL) BibTeX
- Hyung Ki Lee, Dong Sam Ha:
New methods of improving parallel fault simulation in synchronous sequential circuits.
10-17
Electronic Edition (ACM DL) BibTeX
- Sujit Dey, Miodrag Potkonjak, Rabindra K. Roy:
Exploiting hardware sharing in high-level synthesis for partial scan optimization.
20-25
Electronic Edition (ACM DL) BibTeX
- Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey:
High level synthesis for reconfigurable datapath structures.
26-29
Electronic Edition (ACM DL) BibTeX
- Haidar Harmanani, Christos A. Papachristou:
An improved method for RTL synthesis with testability tradeoffs.
30-35
Electronic Edition (ACM DL) BibTeX
- Hiroshige Fujii, Goichi Ootomo, Chikahiro Hori:
Interleaving based variable ordering methods for ordered binary decision diagrams.
38-41
Electronic Edition (ACM DL) BibTeX
- Richard Rudell:
Dynamic variable ordering for ordered binary decision diagrams.
42-47
Electronic Edition (ACM DL) BibTeX
- Hiroyuki Ochi, Koichi Yasuoka, Shuzo Yajima:
Breadth-first manipulation of very large binary-decision diagrams.
48-55
Electronic Edition (ACM DL) BibTeX
- S. Y. Kim, Emre Tuncer, Rohini Gupta, Byron Krauter, T. Savarino, Dean P. Neikirk, Lawrence T. Pillage:
An efficient methodology for extraction and simulation of transmission lines for application specific electronic modules.
58-65
Electronic Edition (ACM DL) BibTeX
- Eli Chiprout, Hansruedi Heeb, Michel S. Nakhla, Albert E. Ruehli:
Simulating 3-D retarded interconnect models using complex frequency hopping (CFH).
66-72
Electronic Edition (ACM DL) BibTeX
- Jaebum Lee, Eugene Shragowitz, David J. Poli:
Bounds on net lengths for high-speed PCB.
73-76
Electronic Edition (ACM DL) BibTeX
- Hua Xue, Chennian Di, Jochen A. G. Jess:
A net-oriented method for realistic fault analysis.
78-83
Electronic Edition (ACM DL) BibTeX
- Shambhu J. Upadhyaya, Liang-Chi Chen:
On-chip test generation for combinational circuits by LFSR modification.
84-87
Electronic Edition (ACM DL) BibTeX
- Naveena Nagi, Abhijit Chatterjee, Ashok Balivada, Jacob A. Abraham:
Fault-based automatic test generator for linear analog circuits.
88-91
Electronic Edition (ACM DL) BibTeX
- Hyuk-Jae Jang, Barry M. Pangrle:
A grid-based approach for connectivity binding with geometric costs.
94-99
Electronic Edition (ACM DL) BibTeX
- Vasily G. Moshnyaga, Hiroshi Mori, Hidetoshi Onodera, Keikichi Tamaru:
Layout-driven module selection for register-transfer synthesis of sub-micron ASIC's.
100-103
Electronic Edition (ACM DL) BibTeX
- Elke A. Rundensteiner:
Design tool integration using object-oriented database views.
104-107
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Yuzheng Ding:
Beyond the combinatorial limit in depth minimization for LUT-based FPGA designs.
110-114
Electronic Edition (ACM DL) BibTeX
- Rajeev Murgai, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Cube-packing and two-level minimization.
115-122
Electronic Edition (ACM DL) BibTeX
- Chau-Shen Chen, Yu-Wen Tsay, TingTing Hwang, Allen C.-H. Wu, Youn-Long Lin:
Combining technology mapping and placement for delay-optimization in FPGA designs.
123-127
Electronic Edition (ACM DL) BibTeX
- Chih-Po Wen, Katherine A. Yelick:
Parallel timing simulation on a distributed memory multiprocessor.
130-135
Electronic Edition (ACM DL) BibTeX
- Anirudh Devgan, Ronald A. Rohrer:
Event driven adaptively controlled explicit simulation of integrated circuits.
136-140
Electronic Edition (ACM DL) BibTeX
- Richard J. Trihy, Ronald A. Rohrer:
Simulating sigma-delta modulators in AWEswit.
141-144
Electronic Edition (ACM DL) BibTeX
- Henrik Hulgaard, Steven M. Burns, Tod Amon, Gaetano Borriello:
Practical applications of an efficient time separation of events algorithm.
146-151
Electronic Edition (ACM DL) BibTeX
- Timothy M. Burks, Karem A. Sakallah:
Min-max linear programming and the timing analysis of digital circuits.
152-155
Electronic Edition (ACM DL) BibTeX
- Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Minimum padding to satisfy short path constraints.
156-161
Electronic Edition (ACM DL) BibTeX
- Hyunchul Shin, Chunghee Kim, Wonjong Kim, Myoungsub Oh, Kwangjoon Rhee, Seogyun Choi, Heasoo Chung:
A combined hierarchical placement algorithm.
164-169
Electronic Edition (ACM DL) BibTeX
- Wern-Jieh Sun, Carl Sechen:
Efficient and effective placement for very large circuits.
170-177
Electronic Edition (ACM DL) BibTeX
- Chih-Liang Eric Cheng, Ching-yen Ho:
SEFOP: a novel approach to data path module placement.
178-181
Electronic Edition (ACM DL) BibTeX
- Thomas Tamisier:
Computing the observable equivalence relation of a finite state machine.
184-187
Electronic Edition (ACM DL) BibTeX
- R. Iris Bahar, Erica A. Frohm, Charles M. Gaona, Gary D. Hachtel, Enrico Macii, Abelardo Pardo, Fabio Somenzi:
Algebraic decision diagrams and their applications.
188-191
Electronic Edition (ACM DL) BibTeX
- Aarti Gupta, Allan L. Fisher:
Representation and symbolic manipulation of linearly inductive Boolean functions.
192-199
Electronic Edition (ACM DL) BibTeX
- Dinesh D. Gaitonde, Duncan M. Hank Walker:
Test quality and yield analysis using the DEFAM defect to fault mapper.
202-205
Electronic Edition (ACM DL) BibTeX
- Sachin S. Sapatnekar, Pravin M. Vaidya, Steve M. Kang:
Convexity-based algorithms for design centering.
206-209
Electronic Edition (ACM DL) BibTeX
- Julie Chen, Andrew T. Yang:
Style: a technology-independent approach to statistical design.
210-214
Electronic Edition (ACM DL) BibTeX
- Kerry S. Lowe, P. Glenn Gulak:
Gate sizing and buffer insertion for optimizing performance in power constrained BiCMOS circuits.
216-219
Electronic Edition (ACM DL) BibTeX
- Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj:
A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area.
220-223
Electronic Edition (ACM DL) BibTeX
- Chi-Ying Tsui, Massoud Pedram, Alvin M. Despain:
Efficient estimation of dynamic power consumption under a real delay model.
224-228
Electronic Edition (ACM DL) BibTeX
- Massoud Pedram, Bahman S. Nobandegani, Bryan Preas:
Architecture and routability analysis for row-based FPGAs.
230-235
Electronic Edition (ACM DL) BibTeX
- Gabriele Saucier, Daniel R. Brasen, J. P. Hiol:
Partitioning with cone structures.
236-239
Electronic Edition (ACM DL) BibTeX
- Enric Pastor, Jordi Cortadella:
Polynomial algorithms for the synthesis for hazard-free circuits from signal transition graphs.
250-254
Electronic Edition (ACM DL) BibTeX
- Kenneth Y. Yun, David L. Dill:
Unifying synchronous/asynchronous state machine synthesis.
255-260
Electronic Edition (ACM DL) BibTeX
- Peter A. Beerel, Jerry R. Burch, Teresa H. Y. Meng:
Efficient verification of determinate speed-independent circuits.
261-267
Electronic Edition (ACM DL) BibTeX
- Mark W. Reichelt, Andrew Lumsdaine, Jacob K. White:
Accelerated waveform methods for parallel transient simulation of semiconductor devices.
270-274
Electronic Edition (ACM DL) BibTeX
- Mi-Chang Chang, Jue-Hsien Chern, Ping Yang:
An accurate grid local truncation error for device simulation.
275-282
Electronic Edition (ACM DL) BibTeX
- X. Cai, H. Yie, P. Osterberg, J. Gilbert, Stephen D. Senturia, Jacob K. White:
A relaxation/multipole-accelerated scheme for self-consistent electromechanical analysis of complex 3-D microelectromechanical structures.
283-286
Electronic Edition (ACM DL) BibTeX
- Brian Lockyear, Carl Ebeling:
The practical application of retiming to the design of high-performance systems.
288-295
Electronic Edition (ACM DL) BibTeX
- Lung-Tien Liu, Minshine Shih, Nan-Chi Chou, Chung-Kuan Cheng, Walter H. Ku:
Performance-driven partitioning using retiming and replication.
296-299
Electronic Edition (ACM DL) BibTeX
- Alexander T. Ishii:
Retiming gated-clocks and precharged circuit structures.
300-307
Electronic Edition (ACM DL) BibTeX
- Luis Entrena, Kwang-Ting Cheng:
Sequential logic optimization by redundancy addition and removal.
310-315
Electronic Edition (ACM DL) BibTeX
- Yosinori Watanabe, Robert K. Brayton:
The maximum set of permissible behaviors for FSM networks.
316-320
Electronic Edition (ACM DL) BibTeX
- Huey-Yih Wang, Robert K. Brayton:
Input don't care sequences in FSM networks.
321-328
Electronic Edition (ACM DL) BibTeX
- Christopher Michael, Christopher J. Abel, C. S. Teng:
A flexible statistical model for CAD of submicrometer analog CMOS integrated circuits.
330-333
Electronic Edition (ACM DL) BibTeX
- Pradip Mandal, V. Visvanathan:
Macromodeling of the A.C. characteristics of CMOS Op-amps.
334-340
Electronic Edition (ACM DL) BibTeX
- Edward W. Y. Liu, Alberto L. Sangiovanni-Vincentelli:
Nyquist data converter testing and yield analysis using behavioral simulation.
341-348
Electronic Edition (ACM DL) BibTeX
- Andrea Casotto:
Run-time requirement tracing.
350-355
Electronic Edition (ACM DL) BibTeX
- K. Olav ten Bosch, Pieter van der Wolf, Peter Bingley:
A flow-based user interface for efficient execution of the design cycle.
356-363
Electronic Edition (ACM DL) BibTeX
- Eric J. Golin, Annette C. Feng, Linus Huang, Eric Hughes:
A visual design environment.
364-367
Electronic Edition (ACM DL) BibTeX
- Shantanu Dutt:
New faster Kernighan-Lin-type graph-partitioning algorithms.
370-377
Electronic Edition (ACM DL) BibTeX
- Mark Beardslee, Alberto L. Sangiovanni-Vincentelli:
An algorithm for improving partitions of pin-limited multi-chip systems.
378-385
Electronic Edition (ACM DL) BibTeX
- Majid Sarrafzadeh:
Transforming an arbitrary floorplan into a sliceable one.
386-389
Electronic Edition (ACM DL) BibTeX
- Wolfgang Ecker, M. Hofmeister:
State look ahead technique for cycle optimization of interacting finite state Moore machines.
392-397
Electronic Edition (ACM DL) BibTeX
- José C. Monteiro, Srinivas Devadas, Abhijit Ghosh:
Retiming sequential circuits for low power.
398-402
Electronic Edition (ACM DL) BibTeX
- Gary D. Hachtel, Fabio Somenzi:
A symbolic algorithm for maximum flow in 0-1 networks.
403-406
Electronic Edition (ACM DL) BibTeX
- Edoardo Charbon, Enrico Malavasi, Alberto L. Sangiovanni-Vincentelli:
Generalized constraint generation for analog circuit design.
408-414
Electronic Edition (ACM DL) BibTeX
- Bulent Basaran, Rob A. Rutenbar, L. Richard Carley:
Latchup-aware placement and parasitic-bounded routing of custom analog cells.
415-421
Electronic Edition (ACM DL) BibTeX
- Nishath K. Verghese, Sang-Soo Lee, David J. Allstot:
A unified approach to simulating electrical and thermal substrate coupling interactions in ICs.
422-426
Electronic Edition (ACM DL) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
Test generation for path delay faults based on learning.
428-435
Electronic Edition (ACM DL) BibTeX
- Seiji Kajihara, Tetsuji Sumioka, Kozo Kinoshita:
Test generation for multiple faults based on parallel vector pair analysis.
436-439
Electronic Edition (ACM DL) BibTeX
- Debashis Bhattacharya, Prathima Agrawal:
Boolean algebraic test generation using a distributed system.
440-443
Electronic Edition (ACM DL) BibTeX
- Steve C.-Y. Huang, Wayne Wolf:
Scheduling a minimum dependence in FSMs.
446-449
Electronic Edition (ACM DL) BibTeX
- Yuan-Long Jeang, Yu-Chin Hsu, Jhing-Fa Wang, Jau-Yien Lee:
High throughput pipelined data path synthesis by conserving the regularity of nested loops.
450-453
Electronic Edition (ACM DL) BibTeX
- Adwin H. Timmer, Jochen A. G. Jess:
Execution interval analysis under resource constraints.
454-459
Electronic Edition (ACM DL) BibTeX
- Alok Jain, Randal E. Bryant:
Inverter minimization in multi-level logic networks.
462-465
Electronic Edition (ACM DL) BibTeX
- K. Kodandapani, Joel Grodstein, Antun Domic, Hervé J. Touati:
A simple algorithm for fanout optimization using high-performance buffer libraries.
466-471
Electronic Edition (ACM DL) BibTeX
- Robert N. Mayo, Hervé J. Touati:
Boolean matching for full-custom ECL gates.
472-477
Electronic Edition (ACM DL) BibTeX
- Kai Zhu, D. F. Wong, Yao-Wen Chang:
Switch module design with application to two-dimensional segmentation design.
480-485
Electronic Edition (ACM DL) BibTeX
- Yachyang Sun, Ting-Chi Wang, Chak-Kuen Wong, C. L. Liu:
Routing for symmetric FPGAs and FPICs.
486-490
Electronic Edition (ACM DL) BibTeX
- William Swartz, Carl Sechen:
A new generalized row-based global router.
491-498
Electronic Edition (ACM DL) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
On diagnosis and correction of design errors.
500-507
Electronic Edition (ACM DL) BibTeX
- Paul G. Ryan, W. Kent Fuchs, Irith Pomeranz:
Fault dictionary compression and equivalence class computation for sequential circuits.
508-511
Electronic Edition (ACM DL) BibTeX
- Yasushi Koseko, Takuji Ogihara, Shinichi Murai:
Tri-state bus conflict checking method for ATPG using BDD.
512-515
Electronic Edition (ACM DL) BibTeX
- Miguel R. Corazao, Marwan A. Khalaf, Lisa M. Guerra, Miodrag Potkonjak, Jan M. Rabaey:
Instruction set mapping for performance optimization.
518-521
Electronic Edition (ACM DL) BibTeX
- Werner Geurts, Francky Catthoor, Hugo De Man:
Quadratic zero-one programming based synthesis of application specific data paths.
522-525
Electronic Edition (ACM DL) BibTeX
- Alauddin Alomary, Takeharu Nakata, Yoshimichi Honma, Masaharu Imai, Nobuyuki Hikichi:
An ASIP instruction set optimization algorithm with functional module sharing constraint.
526-532
Electronic Edition (ACM DL) BibTeX
- Daniel Brand:
Verification of large synthesized designs.
534-537
Electronic Edition (ACM DL) BibTeX
- Wolfgang Kunz:
HANNIBAL: an efficient tool for logic verification based on recursive learning.
538-543
Electronic Edition (ACM DL) BibTeX
- Amelia Shen, Srinivas Devadas, Abhijit Ghosh:
Probabilistic construction and manipulation of free Boolean diagrams.
544-583
Electronic Edition (ACM DL) BibTeX
- Peter Marwedel:
Tree-based mapping of algorithms to predefined structures.
586-593
Electronic Edition (ACM DL) BibTeX
- Ing-Jer Huang, Alvin M. Despain:
Hardware/software resolution of pipeline hazards in pipeline synthesis of instruction set processors.
594-599
Electronic Edition (ACM DL) BibTeX
- Raj S. Mitra, Biswaroop Guha, Anupam Basu:
Rapid prototyping of microprocessor-based systems.
600-603
Electronic Edition (ACM DL) BibTeX
- Stan Y. Liao, Srinivas Devadas, Abhijit Ghosh:
Boolean factorization using multiple-valued minimization.
606-611
Electronic Edition (ACM DL) BibTeX
- Jerry R. Burch, David L. Dill, Elizabeth Wolf, Giovanni De Micheli:
Modeling hierarchical combinational circuits.
612-617
Electronic Edition (ACM DL) BibTeX
- Sharad Malik:
Analysis of cyclic combinational circuits.
618-625
Electronic Edition (ACM DL) BibTeX
- Qing Zhu, Wayne Wei-Ming Dai, Joe G. Xi:
Optimal sizing of high-speed clock networks based on distributed RC and lossy transmission line models.
628-633
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Kwok-Shing Leung:
Optimal wiresizing under the distributed Elmore delay model.
634-639
Electronic Edition (ACM DL) BibTeX
- Robert J. Carragher, Chung-Kuan Cheng, Masahiro Fujita:
An efficient algorithm for the net matching problem.
640-644
Electronic Edition (ACM DL) BibTeX
- Chien-In Henry Chen, Joel T. Yuen:
Logic partitioning to pseudo-exhaustive test for BIST design.
646-649
Electronic Edition (ACM DL) BibTeX
- Dipanwita Roy Chowdhury, Supratik Chakraborty, B. Vamsi, B. Pal Chaudhuri:
Cellular automata based synthesis of easily and fully testable FSMs.
650-653
Electronic Edition (ACM DL) BibTeX
- Meryem Marzouki, Marcelo Lubaszewski, Mohamed Hedi Touati:
Unifying test and diagnosis of interconnects and logic clusters in partial boundary scan boards.
654-657
Electronic Edition (ACM DL) BibTeX
- Tilman Kolks, Bill Lin, Hugo De Man:
Sizing and verification of communication buffers for communicating processes.
660-664
Electronic Edition (ACM DL) BibTeX
- Dhiraj K. Pradhan, Mitrajit Chatterjee, Savita Banerjee:
Buffer assignment for data driven architectures.
665-668
Electronic Edition (ACM DL) BibTeX
- Florin Balasa, Francky Catthoor, Hugo De Man:
Exact evaluation of memory size for multi-dimensional signal processing systems.
669-672
Electronic Edition (ACM DL) BibTeX
- Ted Stanion, Carl Sechen:
Maximum projections of don't care conditions in a Boolean network.
674-679
Electronic Edition (ACM DL) BibTeX
- Dirk Möller, Janett Mohnke, Michael Weber:
Detection of symmetry of Boolean functions represented by ROBDDs.
680-684
Electronic Edition (ACM DL) BibTeX
- Yung-Te Lai, Massoud Pedram, Sarma B. K. Vrudhula:
FGILP: an integer linear program solver based on function graphs.
685-689
Electronic Edition (ACM DL) BibTeX
- Tong Gao, C. L. Liu:
Minimum crosstalk channel routing.
692-696
Electronic Edition (ACM DL) BibTeX
- Kamal Chaudhary, Akira Onozawa, Ernest S. Kuh:
A spacing algorithm for performance enhancement and cross-talk reduction.
697-702
Electronic Edition (ACM DL) BibTeX
- Lih-Yang Wang, Yen-Tai Lai, Bin-Da Liu, Ting-Chung Chang:
A graph-based simplex algorithm for minimizing the layout size and the delay on timing critical paths.
703-708
Electronic Edition (ACM DL) BibTeX
- Sridhar Narayanan, Melvin A. Breuer:
Reconfigurable scan chains: a novel approach to reduce test application time.
710-715
Electronic Edition (ACM DL) BibTeX
- Ben Mathew, Daniel G. Saab:
Augmented partial reset.
716-719
Electronic Edition (ACM DL) BibTeX
- Debaditya Mukherjee, Massoud Pedram, Melvin A. Breuer:
Merging multiple FSM controllers for DFT/BIST hardware.
720-725
Electronic Edition (ACM DL) BibTeX
- Paul E. R. Lippens, Jef L. van Meerbergen, Wim F. J. Verhaegh, Albert van der Werf:
Allocation of multiport memories for hierarchical data stream.
728-735
Electronic Edition (ACM DL) BibTeX
- Kamlesh Rath, M. Esen Tuna, Steven D. Johnson:
Behavior tables: a basis for system representation and transformational system synthesis.
736-740
Electronic Edition (ACM DL) BibTeX
- Lawrence F. Arnstein, Donald E. Thomas:
A general consistency technique for increasing the controllability of high level synthesis tools.
741-744
Electronic Edition (ACM DL) BibTeX
- Peter Dahlgren, Peter Lidén:
Efficient modeling of switch-level networks containing undetermined logic node states.
746-752
Electronic Edition (ACM DL) BibTeX
- Russell Kao, Mark Horowitz:
Piecewise linear models for Rsim.
753-758
Electronic Edition (ACM DL) BibTeX
- Yun Sik Lee, Peter M. Maurer:
Parallel multi-delay simulation.
759-762
Electronic Edition (ACM DL) BibTeX
- Arjan J. van Genderen, N. P. van der Meijs:
Hierarchical extraction of 3D interconnect capacitances in large regular VLSI structures.
764-769
Electronic Edition (ACM DL) BibTeX
- Mario A. Lopez, Ravi Janardan, Sartaj K. Sahni:
A fast algorithm for VLSI net extraction.
770-774
Electronic Edition (ACM DL) BibTeX
- Takumi Okamoto, Masaki Ishikawa, Tomoyuki Fujita:
A new feed-through assignment algorithm based on a flow model.
775-778
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:16:30 2009
by Michael Ley (ley@uni-trier.de)
