VTS 2008:
San Diego,
CA,
USA
26th IEEE VLSI Test Symposium (VTS 2008), April 27 - May 1, 2008, San Diego, California, USA.
IEEE Computer Society 2008 BibTeX
- Qingqi Dou, Jacob A. Abraham:
Low-cost Test of Timing Mismatch Among Time-Interleaved A/D Converters in High-speed Communication Systems.
3-8
Electronic Edition (link) BibTeX
- Muhammad Mudassar Nisar, Abhijit Chatterjee:
Test Enabled Process Tuning for Adaptive Baseband OFDM Processor.
9-16
Electronic Edition (link) BibTeX
- Dongwoo Hong, Kwang-Ting (Tim) Cheng:
Bit-Error Rate Estimation for Bang-Bang Clock and Data Recovery Circuit in High-Speed Serial Links.
17-22
Electronic Edition (link) BibTeX
- François-Fabien Ferhani, Nirmal R. Saxena, Edward J. McCluskey, Phil Nigh:
How Many Test Patterns are Useless?
23-28
Electronic Edition (link) BibTeX
- Emil Gizdarski:
Constructing Augmented Multimode Compactors.
29-34
Electronic Edition (link) BibTeX
- Ritesh Garg, Richard Putman, Nur A. Touba:
Increasing Output Compaction in Presence of Unknowns Using an X-Canceling MISR with Deterministic Observation.
35-42
Electronic Edition (link) BibTeX
- Intaik Park, Donghwi Lee, Erik Chmelar, Edward J. McCluskey:
Inconsistent Fail due to Limited Tester Timing Accuracy.
47-52
Electronic Edition (link) BibTeX
- Rajesh Tiwari, Abhijeet Shrivastava, Mahit Warhadpande, Srivaths Ravi, Rubin A. Parekhji:
A Regression Based Technique for ATE-Aware Test Data Volume Estimation of System-on-Chips.
53-58
Electronic Edition (link) BibTeX
- Zhaoliang Pan, Melvin A. Breuer:
Basing Acceptable Error-Tolerant Performance on Significance-Based Error-rate (SBER).
59-66
Electronic Edition (link) BibTeX
- King Leong Lee, Nadir Z. Basturkmen, Srikanth Venkataraman:
Diagnosis of Scan Clock Failures.
67-72
Electronic Edition (link) BibTeX
- Sunghoon Chun, Taejin Kim, YongJoon Kim, Sungho Kang:
An Efficient Scan Chain Diagnosis Method Using a New Symbolic Simulation.
73-78
Electronic Edition (link) BibTeX
- Fan Yang, Sreejit Chakravarty, Narendra Devta-Prasanna, Sudhakar M. Reddy, Irith Pomeranz:
On the Detectability of Scan Chain Internal Faults — An Industrial Case Study.
79-84
Electronic Edition (link) BibTeX
- A. Ney, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian, V. Gouin:
An SRAM Design-for-Diagnosis Solution Based on Write Driver Voltage Sensing.
89-94
Electronic Edition (link) BibTeX
- Gurgen Harutunyan, Valery A. Vardanian, Yervant Zorian:
An Efficient March-Based Three-Phase Fault Location and Full Diagnosis Algorithm for Realistic Two-Operation Dynamic Faults in Random Access Memories.
95-100
Electronic Edition (link) BibTeX
- Niladri Narayan Mojumder, Saibal Mukhopadhyay, Jae-Joon Kim, Ching-Te Chuang, Kaushik Roy:
Design and Analysis of a Self-Repairing SRAM with On-Chip Monitor and Compensation Circuitry.
101-106
Electronic Edition (link) BibTeX
- Tze Wee Chen, Kyunglok Kim, Young Moon Kim, Subhasish Mitra:
Gate-Oxide Early Life Failure Prediction.
111-118
Electronic Edition (link) BibTeX
- Daniel Arumí, Rosa Rodríguez-Montañés, Joan Figueras, Stefan Eichenberger, Camelia Hora, Bram Kruseman:
Full Open Defects in Nanometric CMOS.
119-124
Electronic Edition (link) BibTeX
- Uranmandakh Amgalan, Christian Hachmann, Sybille Hellebrand, Hans-Joachim Wunderlich:
Signature Rollback - A Technique for Testing Robust Circuits.
125-130
Electronic Edition (link) BibTeX
- Anshuman Chandra, Rohit Kapur:
Bounded Adjacent Fill for Low Capture Power Scan Testing.
131-138
Electronic Edition (link) BibTeX
- Elif Alpaslan, Yu Huang, Xijiang Lin, Wu-Tung Cheng, Jennifer Dworak:
Reducing Scan Shift Power at RTL.
139-146
Electronic Edition (link) BibTeX
- Yu-Ze Wu, Mango Chia-Tso Chao:
Scan-Chain Reordering for Minimizing Scan-Shift Power Based on Non-Specified Test Cubes.
147-154
Electronic Edition (link) BibTeX
- Apurva Mishra, Mani Soma:
A Time-Domain Method for Pseudo-Spectral Characterization.
163-168
Electronic Edition (link) BibTeX
- Chen-Wei Lin, Jiun-Lang Huang:
A Built-In TFT Array Charge-Sensing Technique for System-on-Panel Displays.
169-174
Electronic Edition (link) BibTeX
- Rajarajan Senguttuvan, Soumendu Bhattacharya, Abhijit Chatterjee:
Fast Accurate Tests for Multi-Carrier Transceiver Specifications: EVM and Noise.
175-180
Electronic Edition (link) BibTeX
- Stefan Spinner, Ilia Polian, Piet Engelke, Bernd Becker, Martin Keim, Wu-Tung Cheng:
Automatic Test Pattern Generation for Interconnect Open Defects.
181-186
Electronic Edition (link) BibTeX
- Stelios Neophytou, Maria K. Michael:
On the Relaxation of n-detect Test Sets.
187-192
Electronic Edition (link) BibTeX
- Sudarshan Bahukudumbi, Krishnendu Chakrabarty:
Test-Pattern Ordering for Wafer-Level Test-During-Burn-In.
193-198
Electronic Edition (link) BibTeX
- Chaoming Zhang, Ranjit Gharpurey, Jacob A. Abraham:
Low Cost RF Receiver Parameter Measurement with On-Chip Amplitude Detectors.
203-208
Electronic Edition (link) BibTeX
- Erdem Serkan Erdogan, Sule Ozev:
Single-Measurement Diagnostic Test Method for Parametric Faults of I/Q Modulating RF Transceivers.
209-214
Electronic Edition (link) BibTeX
- Vishwanath Natarajan, Rajarajan Senguttuvan, Shreyas Sen, Abhijit Chatterjee:
ACT: Adaptive Calibration Test for Performance Enhancement and Increased Testability of Wireless RF Front-Ends.
215-220
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
Synthesis for Broadside Testability of Transition Faults.
221-226
Electronic Edition (link) BibTeX
- Jeremy Lee, Mohammad Tehranipoor:
LS-TDF: Low-Switching Transition Delay Fault Pattern Generation.
227-232
Electronic Edition (link) BibTeX
- Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Tehranipoor:
Test-Pattern Grading and Pattern Selection for Small-Delay Defects.
233-239
Electronic Edition (link) BibTeX
- Zheng Wang, D. M. H. Walker:
Dynamic Compaction for High Quality Delay Test.
243-248
Electronic Edition (link) BibTeX
- Ming-Chien Tsai, Ching-Hwa Cheng, Chiou-Mao Yang:
An All-Digital High-Precision Built-In Delay Time Measurement Circuit.
249-254
Electronic Edition (link) BibTeX
- Jaekwang Lee, Intaik Park, Edward J. McCluskey:
Error Sequence Analysis.
255-260
Electronic Edition (link) BibTeX
- Yao-Hsin Chou, Sy-Yen Kuo, I-Ming Tsai:
QBIST: Quantum Built-in Self-Test for any Boolean Circuit.
261-266
Electronic Edition (link) BibTeX
- James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark Reed, Yiorgos Makris:
A Statistical Approach to Characterizing and Testing Functionalized Nanowires.
267-274
Electronic Edition (link) BibTeX
- Masoud Hashempour, Zahra Mashreghian Arani, Fabrizio Lombardi:
A Metric for Assessing the Error Tolerance of Tile Sets for Punctured DNA Self-Assemblies.
275-282
Electronic Edition (link) BibTeX
- Byoungho Kim, Nash Khouzam, Jacob A. Abraham:
Efficient Loopback Test for Aperture Jitter in Embedded Mixed-Signal Circuits.
293-298
Electronic Edition (link) BibTeX
- Sounil Biswas, R. D. (Shawn) Blanton:
Test Compaction for Mixed-Signal Circuits Using Pass-Fail Test Data.
299-308
Electronic Edition (link) BibTeX
- Joonsung Park, Hongjoong Shin, Jacob A. Abraham:
Parallel Loopback Test of Mixed-Signal Circuits.
309-316
Electronic Edition (link) BibTeX
- Irith Pomeranz, Sudhakar M. Reddy:
Expanded Definition of Functional Operation Conditions and its Effects on the Computation of Functional Broadside Tests.
317-322
Electronic Edition (link) BibTeX
- Manoj Kumar Goparaju, Spyros Tragoudas:
A Novel ATPG Framework to Detect Weight Related Defects in Threshold Logic Gates.
323-328
Electronic Edition (link) BibTeX
- Rajamani Sethuram, Michael L. Bushnell, Vishwani D. Agrawal:
Fault Nodes in Implication Graph for Equivalence/Dominance Collapsing, and Identifying Untestable and Independent Faults.
329-335
Electronic Edition (link) BibTeX
- Desta Tadesse, R. Iris Bahar, Joel Grodstein:
Fast Measurement of the "Non-Deterministic Zone" in Microprocessor Debug Using Maximum Likelihood Estimation.
339-344
Electronic Edition (link) BibTeX
- Joon-Sung Yang, Nur A. Touba:
Expanding Trace Buffer Observation Window for In-System Silicon Debug through Selective Capture.
345-351
Electronic Edition (link) BibTeX
- Chia-Chih Yen, Ten Lin, Hermes Lin, Kai Yang, Ta-Yung Liu, Yu-Chin Hsu:
A General Failure Candidate Ranking Framework for Silicon Debug.
352-358
Electronic Edition (link) BibTeX
- Carlos Arthur Lang Lisbôa, Costas Argyrides, Dhiraj K. Pradhan, Luigi Carro:
Algorithm Level Fault Tolerance: A Technique to Cope with Long Duration Transient Faults in Matrix Multiplication Algorithms.
363-370
Electronic Edition (link) BibTeX
- Michael Nicolaidis, Renaud Perez, Dan Alexandrescu:
Low-Cost Highly-Robust Hardened Cells Using Blocking Feedback Transistors.
371-376
Electronic Edition (link) BibTeX
- Ying Zhang, Huawei Li, Xiaowei Li, Yu Hu:
Codeword Selection for Crosstalk Avoidance and Error Correction on Interconnects.
377-382
Electronic Edition (link) BibTeX
- Minjin Zhang, Huawei Li, Xiaowei Li:
Multiple Coupling Effects Oriented Path Delay Test Generation.
383-388
Electronic Edition (link) BibTeX
- Kyriakos Christou, Maria K. Michael, Paolo Bernardi, Michelangelo Grosso, Ernesto Sánchez, Matteo Sonza Reorda:
A Novel SBST Generation Technique for Path-Delay Faults in Microprocessors Exploiting Gate- and RT-Level Descriptions.
389-394
Electronic Edition (link) BibTeX
- I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty:
An Industrial Case Study of Sticky Path-Delay Faults.
395-402
Electronic Edition (link) BibTeX
Copyright © Sat May 16 23:47:00 2009
by Michael Ley (ley@uni-trier.de)
