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Uwe Gläser

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1999
17EEH.-Ch. Dahmen, Uwe Gläser, Z. Stamenkovic: Modell Evaluation Using Genetic Manipulation Techniques. Great Lakes Symposium on VLSI 1999: 224-225
16EEFulvio Corno, Uwe Gläser, Paolo Prinetto, Matteo Sonza Reorda, Heinrich Theodor Vierhaus, Massimo Violante: SymFony: a hybrid topological-symbolic ATPG exploiting RT-level information. IEEE Trans. on CAD of Integrated Circuits and Systems 18(2): 191-202 (1999)
1998
15EEH.-Ch. Dahmen, Uwe Gläser: The Impact of Area Optimization for the Power Consumption of Controllers. EUROMICRO 1998: 10204-10207
1997
14EEH.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: An Efficient Dynamic Parallel Approach to Automatic Test Pattern Generation. Great Lakes Symposium on VLSI 1997: 112-117
13 H.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: A Parallel Approach Solving the Test Generation Problem for Synchronous Sequential Circuits. PARCO 1997: 549-556
1996
12 Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Uwe Gläser: An ATPG-Based Framework for Verifying Sequential Equivalence. ITC 1996: 865-874
11 H.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor Vierhaus: Automatic Test Pattern Generation with Optimal Load Balancing. PVM 1996: 205-212
10EEUwe Gläser, Heinrich Theodor Vierhaus: Mixed level test generation for synchronous sequential circuits using the FOGBUSTER algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 15(4): 410-423 (1996)
1995
9EEUwe Gläser, Kwang-Ting Cheng: Logic optimization by an improved sequential redundancy addition and removal techniques. ASP-DAC 1995
8EEUwe Gläser, Heinrich Theodor Vierhaus: FOGBUSTER: an efficient algorithm for sequential test generation. EURO-DAC 1995: 230-235
7 Uwe Gläser: Systems Level Specification and Modeling of Reactive Systems: Concepts, Methods, and Tools. EUROCAST 1995: 375-385
6EEFulvio Corno, Paolo Prinetto, Matteo Sonza Reorda, Uwe Gläser, Heinrich Theodor Vierhaus: Improving topological ATPG with symbolic techniques. VTS 1995: 338-343
1994
5EEUwe Gläser, Heinrich Theodor Vierhaus, M. Kley, A. Wiederhold: Test generation for bridging faults in CMOS ICs based on current monitoring versus signal propagation. ICCAD 1994: 36-39
4 R. Wolber, Uwe Gläser, Heinrich Theodor Vierhaus: Testability Analysis for Test Generation in Synchronous Sequential Circuits. ICCD 1994: 350-353
1993
3 Heinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Gläser: CMOS Bridges and Resistive Transistor Faults: IDDQ versus Delay Effects. ITC 1993: 83-91
1992
2 Uwe Gläser, Uwe Hübner, Heinrich Theodor Vierhaus: Mixed Level Hierarchical Test Generation for Transition Faults and Overcurrent Related Defects. ITC 1992: 21-29
1989
1 Uwe Gläser, U. Steinhausen: Fehlererkennung und Fehlertoleranz beim assoziativen RAM(ARAM)-Speicher. Fehlertolerierende Rechensysteme 1989: 320-333

Coauthor Index

1Kuang-Chien Chen [12]
2Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng) [9] [12]
3Fulvio Corno [6] [16]
4H.-Ch. Dahmen [11] [13] [14] [15] [17]
5Shi-Yu Huang [12]
6Uwe Hübner [2]
7M. Kley [5]
8Wolfgang Meyer [3]
9Paolo Prinetto [6] [16]
10Matteo Sonza Reorda [6] [16]
11Z. Stamenkovic [17]
12U. Steinhausen [1]
13Heinrich Theodor Vierhaus [2] [3] [4] [5] [6] [8] [10] [11] [13] [14] [16]
14Massimo Violante [16]
15A. Wiederhold [5]
16R. Wolber [4]

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Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)