| 1999 |
|---|
| 6 | | Douglas Chang,
Malgorzata Marek-Sadowska:
Partitioning Sequential Circuits on Dynamically Reconfigurable FPGAs.
IEEE Trans. Computers 48(6): 565-578 (1999) |
| 1998 |
|---|
| 5 | EE | Douglas Chang,
Kwang-Ting Cheng,
Malgorzata Marek-Sadowska,
Mike Tien-Chien Lee:
Functional Scan Chain Testing.
DATE 1998: 278- |
| 4 | EE | Douglas Chang,
Malgorzata Marek-Sadowska:
Partitioning Sequential Circuits on Dynamically Reconfiguable FPGAs.
FPGA 1998: 161-167 |
| 1997 |
|---|
| 3 | EE | Douglas Chang,
Mike Tien-Chien Lee,
Malgorzata Marek-Sadowska,
Takashi Aikyo,
Kwang-Ting Cheng:
A Test Synthesis Approach to Reducing BALLAST DFT Overhead.
DAC 1997: 466-471 |
| 2 | EE | Douglas Chang,
Malgorzata Marek-Sadowska:
Buffer Minimization and Time-Multiplexed I/O on Dynamically Reconfigurable FPGAs.
FPGA 1997: 142-148 |
| 1994 |
|---|
| 1 | EE | Yu-Liang Wu,
Douglas Chang:
On the NP-completeness of regular 2-D FPGA routing architectures and a novel solution.
ICCAD 1994: 362-366 |
