2009 |
16 | EE | Chenn-Jung Huang,
You-Jia Chen,
Chi-Feng Wu,
Yi-An Huang:
Application of neural networks and genetic algorithms to the screening for high quality chips.
Appl. Soft Comput. 9(2): 824-832 (2009) |
2003 |
15 | EE | Chih-Tsun Huang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu:
Built-in redundancy analysis for memory yield improvement.
IEEE Transactions on Reliability 52(4): 386-399 (2003) |
14 | EE | Hsiao-Hwa Chen,
Jin-Xiao Lin,
Shin-Wei Chu,
Chi-Feng Wu,
Guo-Sheng Chen:
Isotropic air-interface technologies for fourth generation wireless communications.
Wireless Communications and Mobile Computing 3(6): 687-704 (2003) |
2002 |
13 | EE | Jen-Chieh Yeh,
Chi-Feng Wu,
Kuo-Liang Cheng,
Yung-Fa Chou,
Chih-Tsun Huang,
Cheng-Wen Wu:
Flash Memory Built-In Self-Test Using March-Like Algorithm.
DELTA 2002: 137-141 |
12 | EE | Chenn-Jung Huang,
Chua-Chin Wang,
Chi-Feng Wu:
Image Processing Techniques for Wafer Defect Cluster Identification.
IEEE Design & Test of Computers 19(2): 44-48 (2002) |
11 | EE | Chi-Feng Wu,
Chih-Tsun Huang,
Kuo-Liang Cheng,
Cheng-Wen Wu:
Fault simulation and test algorithm generation for random accessmemories.
IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 480-490 (2002) |
10 | EE | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM.
J. Electronic Testing 18(6): 637-647 (2002) |
2001 |
9 | EE | Chih-Wea Wang,
Ruey-Shing Tzeng,
Chi-Feng Wu,
Chih-Tsun Huang,
Cheng-Wen Wu,
Shi-Yu Huang,
Shyh-Horng Lin,
Hsin-Po Wang:
A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters.
Asian Test Symposium 2001: 103- |
8 | EE | Chi-Feng Wu,
Chih-Tsun Huang,
Kuo-Liang Cheng,
Chih-Wea Wang,
Cheng-Wen Wu:
Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories.
DAC 2001: 301-306 |
2000 |
7 | EE | Kwang-Ting Cheng,
Vishwani D. Agrawal,
Jing-Yang Jou,
Li-C. Wang,
Chi-Feng Wu,
Shianling Wu:
Collaboration between Industry and Academia in Test Research.
Asian Test Symposium 2000: 17- |
6 | EE | Chih-Wea Wang,
Chi-Feng Wu,
Jin-Fu Li,
Cheng-Wen Wu,
Tony Teng,
Kevin Chiu,
Hsiao-Ping Lin:
A built-in self-test and self-diagnosis scheme for embedded SRAM.
Asian Test Symposium 2000: 45-50 |
5 | | Chi-Feng Wu,
Chih-Tsun Huang,
Chih-Wea Wang,
Kuo-Liang Cheng,
Cheng-Wen Wu:
Error Catch and Analysis for Semiconductor Memories Using March Tests.
ICCAD 2000: 468-471 |
4 | EE | Chi-Feng Wu,
Chih-Tsun Huang,
Kuo-Liang Cheng,
Cheng-Wen Wu:
Simulation-Based Test Algorithm Generation for Random Access Memories.
VTS 2000: 291-296 |
1999 |
3 | EE | Chi-Feng Wu,
Cheng-Wen Wu:
Testing Interconnects of Dynamic Reconfigurable FPGAs.
ASP-DAC 1999: 279-282 |
2 | EE | Chi-Feng Wu,
Chih-Tsun Huang,
Cheng-Wen Wu:
RAMSES: A Fast Memory Fault Simulator.
DFT 1999: 165-173 |
1 | EE | Chih-Tsun Huang,
Jing-Reng Huang,
Chi-Feng Wu,
Cheng-Wen Wu,
Tsin-Yuan Chang:
A Programmable BIST Core for Embedded DRAM.
IEEE Design & Test of Computers 16(1): 59-70 (1999) |