dblp.uni-trier.dewww.uni-trier.de

Chi-Feng Wu

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2009
16EEChenn-Jung Huang, You-Jia Chen, Chi-Feng Wu, Yi-An Huang: Application of neural networks and genetic algorithms to the screening for high quality chips. Appl. Soft Comput. 9(2): 824-832 (2009)
2003
15EEChih-Tsun Huang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu: Built-in redundancy analysis for memory yield improvement. IEEE Transactions on Reliability 52(4): 386-399 (2003)
14EEHsiao-Hwa Chen, Jin-Xiao Lin, Shin-Wei Chu, Chi-Feng Wu, Guo-Sheng Chen: Isotropic air-interface technologies for fourth generation wireless communications. Wireless Communications and Mobile Computing 3(6): 687-704 (2003)
2002
13EEJen-Chieh Yeh, Chi-Feng Wu, Kuo-Liang Cheng, Yung-Fa Chou, Chih-Tsun Huang, Cheng-Wen Wu: Flash Memory Built-In Self-Test Using March-Like Algorithm. DELTA 2002: 137-141
12EEChenn-Jung Huang, Chua-Chin Wang, Chi-Feng Wu: Image Processing Techniques for Wafer Defect Cluster Identification. IEEE Design & Test of Computers 19(2): 44-48 (2002)
11EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Fault simulation and test algorithm generation for random accessmemories. IEEE Trans. on CAD of Integrated Circuits and Systems 21(4): 480-490 (2002)
10EEChih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A Built-in Self-Test Scheme with Diagnostics Support for Embedded SRAM. J. Electronic Testing 18(6): 637-647 (2002)
2001
9EEChih-Wea Wang, Ruey-Shing Tzeng, Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu, Shi-Yu Huang, Shyh-Horng Lin, Hsin-Po Wang: A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. Asian Test Symposium 2001: 103-
8EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Chih-Wea Wang, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation and Port Scheduling for Multi-Port Memories. DAC 2001: 301-306
2000
7EEKwang-Ting Cheng, Vishwani D. Agrawal, Jing-Yang Jou, Li-C. Wang, Chi-Feng Wu, Shianling Wu: Collaboration between Industry and Academia in Test Research. Asian Test Symposium 2000: 17-
6EEChih-Wea Wang, Chi-Feng Wu, Jin-Fu Li, Cheng-Wen Wu, Tony Teng, Kevin Chiu, Hsiao-Ping Lin: A built-in self-test and self-diagnosis scheme for embedded SRAM. Asian Test Symposium 2000: 45-50
5 Chi-Feng Wu, Chih-Tsun Huang, Chih-Wea Wang, Kuo-Liang Cheng, Cheng-Wen Wu: Error Catch and Analysis for Semiconductor Memories Using March Tests. ICCAD 2000: 468-471
4EEChi-Feng Wu, Chih-Tsun Huang, Kuo-Liang Cheng, Cheng-Wen Wu: Simulation-Based Test Algorithm Generation for Random Access Memories. VTS 2000: 291-296
1999
3EEChi-Feng Wu, Cheng-Wen Wu: Testing Interconnects of Dynamic Reconfigurable FPGAs. ASP-DAC 1999: 279-282
2EEChi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu: RAMSES: A Fast Memory Fault Simulator. DFT 1999: 165-173
1EEChih-Tsun Huang, Jing-Reng Huang, Chi-Feng Wu, Cheng-Wen Wu, Tsin-Yuan Chang: A Programmable BIST Core for Embedded DRAM. IEEE Design & Test of Computers 16(1): 59-70 (1999)

Coauthor Index

1Vishwani D. Agrawal [7]
2Tsin-Yuan Chang [1]
3Guo-Sheng Chen [14]
4Hsiao-Hwa Chen [14]
5You-Jia Chen [16]
6Kuo-Liang Cheng [4] [5] [8] [11] [13]
7Kwang-Ting Cheng (Kwang-Ting (Tim) Cheng) [7]
8Kevin Chiu [6] [10]
9Yung-Fa Chou [13]
10Shin-Wei Chu [14]
11Chenn-Jung Huang [12] [16]
12Chih-Tsun Huang [1] [2] [4] [5] [8] [9] [11] [13] [15]
13Jing-Reng Huang [1]
14Shi-Yu Huang [9]
15Yi-An Huang [16]
16Jing-Yang Jou [7]
17Jin-Fu Li [6] [10] [15]
18Hsiao-Ping Lin [6] [10]
19Jin-Xiao Lin [14]
20Shyh-Horng Lin [9]
21Tony Teng [6] [10]
22Ruey-Shing Tzeng [9]
23Chih-Wea Wang [5] [6] [8] [9] [10]
24Chua-Chin Wang [12]
25Hsin-Po Wang [9]
26Li-C. Wang [7]
27Cheng-Wen Wu [1] [2] [3] [4] [5] [6] [8] [9] [10] [11] [13] [15]
28Shianling Wu [7]
29Jen-Chieh Yeh [13]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)