| 2009 |
|---|
| 15 | EE | Chen-Wei Lin,
Jiun-Lang Huang:
A Charge-Sensing-Capable Source Driver for TFT Array Testing in System-on-Panel Displays.
JCP 4(4): 338-346 (2009) |
| 2008 |
|---|
| 14 | EE | Chen-Wei Lin,
Jiun-Lang Huang:
A Built-In TFT Array Charge-Sensing Technique for System-on-Panel Displays.
VTS 2008: 169-174 |
| 2006 |
|---|
| 13 | EE | Jiun-Lang Huang,
Jui-Jer Huang,
Yuan-Shuang Liu:
A Low-Cost Jitter Measurement Technique for BIST Applications.
J. Electronic Testing 22(3): 219-228 (2006) |
| 12 | EE | Jiun-Lang Huang:
On-Chip Random Jitter Testing Using Low Tap-Count Coarse Delay Lines.
J. Electronic Testing 22(4-6): 387-398 (2006) |
| 2005 |
|---|
| 11 | EE | Jiun-Lang Huang:
Random Jitter Testing Using Low Tap-Count Delay Lines.
Asian Test Symposium 2005: 100-105 |
| 2004 |
|---|
| 10 | EE | Jui-Jer Huang,
Jiun-Lang Huang:
An Infrastructure IP for On-Chip Clock Jitter Measurement.
ICCD 2004: 186-191 |
| 2003 |
|---|
| 9 | EE | Jui-Jer Huang,
Jiun-Lang Huang:
A Low-Cost Jitter Measurement Technique for BIST Applications.
Asian Test Symposium 2003: 336-339 |
| 2002 |
|---|
| 8 | EE | Hao-Chiao Hong,
Jiun-Lang Huang,
Kwang-Ting Cheng,
Cheng-Wen Wu:
On-chip Analog Response Extraction with 1-Bit ? - Modulators.
Asian Test Symposium 2002: 49- |
| 2001 |
|---|
| 7 | EE | Jiun-Lang Huang,
Kwang-Ting Cheng:
An On-Chip Short-Time Interval Measurement Technique for Testing High-Speed Communication Links.
VTS 2001: 380-387 |
| 2000 |
|---|
| 6 | EE | Jiun-Lang Huang,
Kwang-Ting Cheng:
A sigma-delta modulation based BIST scheme for mixed-signal circuits.
ASP-DAC 2000: 605-612 |
| 5 | EE | Jiun-Lang Huang,
Chee-Kian Ong,
Kwang-Ting Cheng:
A BIST Scheme for On-Chip ADC and DAC Testing.
DATE 2000: 216-220 |
| 4 | | Jiun-Lang Huang,
Kwang-Ting Cheng:
Testing and characterization of the one-bit first-order delta-sigma modulator for on-chip analog signal analysis.
ITC 2000: 1021-1030 |
| 3 | EE | Jan Arild Tofte,
Chee-Kian Ong,
Jiun-Lang Huang,
Kwang-Ting (Tim) Cheng:
Characterization of a Pseudo-Random Testing Technique for Analog and Mixed-Signal Built-in-Self-Test.
VTS 2000: 237-246 |
| 1999 |
|---|
| 2 | EE | Jiun-Lang Huang,
Chen-Yang Pan,
Kwang-Ting Cheng:
Specification Back-Propagation and Its Application to DC Fault Simulation for Analog/Mixed-Signal Circuits.
VTS 1999: 220-225 |
| 1997 |
|---|
| 1 | | Jiun-Lang Huang,
Kwang-Ting Cheng:
Analog Fault Diagnosis for Unpowered Circuit Boards.
ITC 1997: 640-648 |
