27. DAC 1990:
Orlando,
Florida,
USA
Proceedings of the 27th ACM/IEEE Design Automation Conference. Orlando,
Florida,
USA,
June 24-28,
1990. IEEE Computer Society Press,
1990,
ISBN 0-8186-9650-X
HDL Validation and Intermediate Format
Probabilistic Techniques in Placement:
Annealing and Its Competitors
Binary Decision Diagrams - Implementations and Applications
Panel
New Scheduling,
Allocation and Mapping Techniques
Timing Driven Layout Techniques
- Wilm E. Donath, Reini J. Norman, Bhuwan K. Agrawal, Stephen E. Bello, Sang-Yong Han, Jerome M. Kurtzberg, Paul Lowy, Roger I. McMillan:
Timing Driven Placement Using Complete Path Delays.
84-89
Electronic Edition (ACM DL) BibTeX
- Suphachai Sutanthavibul, Eugene Shragowitz:
An Adaptive Timing-Driven Layout for High Speed VLSI.
90-95
Electronic Edition (ACM DL) BibTeX
- Masayuki Terai, Kazuhiro Takahashi, Koji Sato:
A New Min-Cut Placement Algorithm for Timing Assurance Layout Design Meeting Net Length Constraint.
96-102
Electronic Edition (ACM DL) BibTeX
- Ichiang Lin, David Hung-Chang Du:
Performance-Driven Constructive Placement.
103-106
Electronic Edition (ACM DL) BibTeX
- Daniel R. Brasen, Michael L. Bushnell:
MHERTZ: A New Optimization Algorithm for Floorplanning and Global Routing.
107-110
Electronic Edition (ACM DL) BibTeX
Timing Verification
Data Management and Version Control
Data Path Optimization Algorithms
Issues in Floorplanning
Formal Methods for Design Verification
Panel
- Basant R. Chawla:
Distributed Computing Environment for Design Automation in the 90's (Panel Abstract).
220 BibTeX
Synthesis and Testability
Tutorial:
Layout Synthesis of MOS Digital Cells
Layout Verification
Software Engineering in Design Automation
Boolean Methods
Layout Synthesis:
Cell Assembly
Computer Aids For IC Manufacturability
Panel
Timing and Routing Optimization in Synthesis
Compactors:
Theory and Practice
Electrical Simulation
Object-Oriented Approaches
Scheduling Algorithms for High-Level Synthesis
Layout Synthesis:
Leaf Cell Generation
Accelerating Logic Simulation
Panel
- A. Richard Newton:
Standards, Openness and Design Environments in Electronic Design Automation (Panel Abstract).
497-498 BibTeX
Data Path Synthesis
Tutorial:
Symbolic Simulation - Techniques and Applications
Testing Systems
Panel
- William Lattin:
Integration of Hardware and Software in Embedded Systems Design (Panel Abstract).
541 BibTeX
Applications of Behavioral Synthesis
Performance Constrained Routing
Testing Using Functional Models
Panel
- Kurt Keutzer:
Impact and Evaluation of Competing Implementation Media for ASIC's (Panel Abstract).
600 BibTeX
Decomposition and Partitioning in Logic Synthesis
- Pranav Ashar, Srinivas Devadas, A. Richard Newton:
A Unified Approach to the Decomposition and Re-Decomposition of Sequential Machines.
601-606
Electronic Edition (ACM DL) BibTeX
- Sujit Dey, Franc Brglez, Gershon Kedem:
Corolla Based Circuit Partitioning and Resynthesis.
607-612
Electronic Edition (ACM DL) BibTeX
- Robert J. Francis, Jonathan Rose, Kevin Chung:
Chortle: A Technology Mapping Program for Lookup Table-Based Field Programmable Gate Arrays.
613-619
Electronic Edition (ACM DL) BibTeX
- Rajeev Murgai, Yoshihito Nishizaki, Narendra V. Shenoy, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Logic Synthesis for Programmable Gate Arrays.
620-625
Electronic Edition (ACM DL) BibTeX
New Approaches to Routing Problems
Combinational Test Generation
Panel
- Tim Andrews:
Object Databases in Electronic Design: Implementation Experiences (Panel Abstract).
679 BibTeX
Alternative Approaches to Behavioral Synthesis
Channel-Oriented Multilayer Routing
Ideas in Testing
Copyright © Sat May 16 23:04:36 2009
by Michael Ley (ley@uni-trier.de)
