Hai Zhou, Enrico Macii, Zhiyuan Yan, Yehia Massoud (Eds.):
Proceedings of the 17th ACM Great Lakes Symposium on VLSI 2007, Stresa, Lago Maggiore, Italy, March 11-13, 2007.
ACM 2007, ISBN 978-1-59593-605-9 BibTeX
Architecture and memory
Timing and power analysis
- Debasish Das, Ahmed Shebaita, Yehea I. Ismail, Hai Zhou, Kip Killpack:
NostraXtalk: a predictive framework for accurate static timing analysis in udsm vlsi circuits.
25-30
Electronic Edition (ACM DL) BibTeX
- Yanming Jia, Yici Cai, Xianlong Hong:
Dummy fill aware buffer insertion during routing.
31-36
Electronic Edition (ACM DL) BibTeX
- Saeeid Tahmasbi Oskuii, Per Gunnar Kjeldsberg, Einar J. Aas:
Probabilistic gate-level power estimation using a novel waveform set method.
37-42
Electronic Edition (ACM DL) BibTeX
- Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl:
Robust wiring networks for DfY considering timing constraints.
43-48
Electronic Edition (ACM DL) BibTeX
Test and reliability
Device,
interconnect,
and power optimization for nano-CMOS
Emerging technologies
- Daniel Große, Xiaobo Chen, Gerhard W. Dueck, Rolf Drechsler:
Exact sat-based toffoli network synthesis.
96-101
Electronic Edition (ACM DL) BibTeX
- Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod:
Combinational equivalence checking for threshold logic circuits.
102-107
Electronic Edition (ACM DL) BibTeX
- Nadine Gergel-Hackett, Garrett S. Rose, Peter C. Paliwoda, Christina A. Hacker, Curt A. Richter:
On-chip characterization of molecular electronic devices using CMOS: the design and simulation of a hybrid circuit based on experimental molecular electronic device results.
108-113
Electronic Edition (ACM DL) BibTeX
- Juan Núñez, José M. Quintana, Maria J. Avedillo:
Operation limits in RTD-based ternary quantizers.
114-119
Electronic Edition (ACM DL) BibTeX
Low power architecture and interconnect
Poster session 1
- Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingrid Verbauwhede:
Side-channel resistant system-level design flow for public-key cryptography.
144-147
Electronic Edition (ACM DL) BibTeX
- R. G. Raghavendra, Bharadwaj Amrutur:
Area efficient loop filter design for charge pump phase locked loop.
148-151
Electronic Edition (ACM DL) BibTeX
- Dariusz Kania:
A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS.
152-155
Electronic Edition (ACM DL) BibTeX
- Dan Li, Tingcun Wei, Wei Wu:
A novel charge recycler for TFT-LCD source driver IC.
156-159
Electronic Edition (ACM DL) BibTeX
- Zhenyu Liu, Yiqing Huang, Yang Song, Satoshi Goto, Takeshi Ikenaga:
Hardware-efficient propagate partial sad architecture for variable block size motion estimation in H.264/AVC.
160-163
Electronic Edition (ACM DL) BibTeX
- Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis:
Compiler assisted architectural exploration for coarse grained reconfigurable arrays.
164-167
Electronic Edition (ACM DL) BibTeX
- Linga Reddy Cenkeramaddi, Tajeshwar Singh, Trond Ytterdal:
Self-biased charge sampling amplifier in 90nm CMOS for medical ultrasound imaging.
168-171
Electronic Edition (ACM DL) BibTeX
- Naghmeh Karimi, Shahrzad Mirkhani, Zainalabedin Navabi, Fabrizio Lombardi:
RT level reliability enhancement by constructing dynamic TMRS.
172-175
Electronic Edition (ACM DL) BibTeX
- Atabak Mahram, Mehrdad Najibi, Hossein Pedram:
An asynchronous fpga logic cell implementation.
176-179
Electronic Edition (ACM DL) BibTeX
- Maurizio Martina, Andrea Terreno, Fabrizio Vacca, Andrea Molino, Guido Masera, Giuseppe D'Angelo, Giorgio Pasquettaz:
Real-time implementation of a time-frequency analysis scheme.
180-183
Electronic Edition (ACM DL) BibTeX
- Maurizio Martina, Guido Masera:
Flexible blocks for high throughput serially concatenated convolutional codes.
184-187
Electronic Edition (ACM DL) BibTeX
- Sreehari Veeramachaneni, Lingamneni Avinash, Kirthi M. Krishna, M. B. Srinivas:
Novel architectures for efficient (m, n) parallel counters.
188-191
Electronic Edition (ACM DL) BibTeX
- Mustafa Altun, Hakan Kuntman:
High CMRR current mode operational amplifier with a novel class AB input stage.
192-195
Electronic Edition (ACM DL) BibTeX
- Barbara Cerato, Guido Masera, Peter Nilsson:
Hardware architecture for matrix factorization in mimo receivers.
196-199
Electronic Edition (ACM DL) BibTeX
- C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner:
Reduced-complexity mimo detector with close-to ml error rate performance.
200-203
Electronic Edition (ACM DL) BibTeX
- Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani:
Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density.
204-207
Electronic Edition (ACM DL) BibTeX
- Drew C. Ness, Christian J. Hescott, David J. Lilja:
Exploring subsets of standard cell libraries to exploit natural fault masking capabilities for reliable logic.
208-211
Electronic Edition (ACM DL) BibTeX
- Osman Musa Abdulkarim, Maitham Shams:
A symmetric mos current-mode logic universal gate for high speed applications.
212-215
Electronic Edition (ACM DL) BibTeX
- Brandon L. Dell, Jonathan F. Bolus, Travis N. Blalock:
An automated unique tagging system using CMOS process variation.
216-218
Electronic Edition (ACM DL) BibTeX
- Antonino Tumeo, Matteo Monchiero, Gianluca Palermo, Fabrizio Ferrandi, Donatella Sciuto:
A design kit for a fully working shared memory multiprocessor on FPGA.
219-222
Electronic Edition (ACM DL) BibTeX
- Karthikeyan Lingasubramanian, Sanjukta Bhanja:
Probabilistic maximum error modeling for unreliable logic circuits.
223-226
Electronic Edition (ACM DL) BibTeX
- Riaz Naseer, Jeff Draper, Younes Boulghassoul, Sandeepan DasGupta, Art Witulski:
Critical charge and set pulse widths for combinational logic in commercial 90nm cmos technology.
227-230
Electronic Edition (ACM DL) BibTeX
- Kimish Patel, Wonbok Lee, Massoud Pedram:
Active bank switching for temperature control of the register file in a microprocessor.
231-234
Electronic Edition (ACM DL) BibTeX
- Chanseok Hwang, Peng Rong, Massoud Pedram:
Sleep transistor distribution in row-based MTCMOS designs.
235-240
Electronic Edition (ACM DL) BibTeX
Circuits and logic
Emerging technologies for low power design
Digital synthesis
- Valentin Gherman, Hans-Joachim Wunderlich, R. D. Mascarenhas, Jürgen Schlöffel, Michael Garbers:
Synthesis of irregular combinational functions with large don't care sets.
287-292
Electronic Edition (ACM DL) BibTeX
- Felipe S. Marques, Leomar S. da Rosa Jr., Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis:
DAG based library-free technology mapping.
293-298
Electronic Edition (ACM DL) BibTeX
- Mehrdad Najibi, Kamran Saleh, Hossein Pedram:
Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint.
299-304
Electronic Edition (ACM DL) BibTeX
- Andrea Ricci, Ilaria De Munari, Paolo Ciampolini:
An evolutionary approach for standard-cell library reduction.
305-310
Electronic Edition (ACM DL) BibTeX
- Salvatore Carta, Andrea Acquaviva, Pablo Garcia Del Valle, David Atienza, Giovanni De Micheli, Fernando Rincón, Luca Benini, Jose Manuel Mendias:
Multi-processor operating system emulation framework with thermal feedback for systems-on-chip.
311-316
Electronic Edition (ACM DL) BibTeX
- Sachin S. Sapatnekar:
Computer-aided design of 3d integrated circuits.
317
Electronic Edition (ACM DL) BibTeX
Embedded tutorial
ASIP/ASIC
System level design
- Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin:
A design methodology for space-time adapter.
347-352
Electronic Edition (ACM DL) BibTeX
- Tarvo Raudvere, Ingo Sander, Axel Jantsch:
A synchronization algorithm for local temporal refinements in perfectly synchronous models with nested feedback loops.
353-358
Electronic Edition (ACM DL) BibTeX
- Amin Farmahini Farahani, Mehdi Kamal, Seid Mehdi Fakhraie, Saeed Safari:
HW/SW partitioning using discrete particle swarm.
359-364
Electronic Edition (ACM DL) BibTeX
- Yuko Hara, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada, Katsuya Ishii:
Complexity-constrainted partitioning of sequential programs for efficient behavioral synthesis.
365-370
Electronic Edition (ACM DL) BibTeX
CMOS & logic applications optimization and techniques
- Chittarsu Raghunandan, K. S. Sainarayanan, M. B. Srinivas:
Bus-encoding technique to reduce delay, power and simultaneous switching noise (SSN) in RLC interconnects.
371-376
Electronic Edition (ACM DL) BibTeX
- Roghoyeh Salmeh, Brent Maundy:
A 5 GHz wide band input and output matched low noise amplifier.
377-380
Electronic Edition (ACM DL) BibTeX
- Himanshu Arora, Nikolaus Klemmer, Patrick Wolf:
A 900 MHz ISM band mash-12 fractional-n frequency synthesizer for 5-Mbps data transmission.
381-386
Electronic Edition (ACM DL) BibTeX
- Paolo Bernardi, Filippo Gandino, Bartolomeo Montrucchio, Maurizio Rebaudengo, Erwing Ricardo Sanchez:
Design of an UHF RFID transponder for secure authentication.
387-392
Electronic Edition (ACM DL) BibTeX
Verification techniques
- Fei He, Xiaoyu Song, Ming Gu, Jiaguang Sun:
Effective heuristics for counterexample-guided abstraction refinement.
393-398
Electronic Edition (ACM DL) BibTeX
- Jen-Chieh Ou, Daniel G. Saab, Qiang Qiang, Jacob A. Abraham:
Reducing verification overhead with RTL slicing.
399-404
Electronic Edition (ACM DL) BibTeX
- Ralf Wimmer, Marc Herbstritt, Bernd Becker:
Optimization techniques for BDD-based bisimulation computation.
405-410
Electronic Edition (ACM DL) BibTeX
- Paolo Bernardi, Michelangelo Grosso, Matteo Sonza Reorda:
Hardware-accelerated path-delay fault grading of functional test programs for processor-based systems.
411-416
Electronic Edition (ACM DL) BibTeX
Optimization and verification
Poster session 2
- Tiziano Villa, Svetlana Zharikova, Nina Yevtushenko, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
A new algorithm for the largest compositionally progressive solution of synchronous language equations.
441-444
Electronic Edition (ACM DL) BibTeX
- Giovanni Agosta, Francesco Bruschi, Donatella Sciuto:
An efficient cost-based canonical form for Boolean matching.
445-448
Electronic Edition (ACM DL) BibTeX
- Rashid Farivar, Simon Kristiansson, Fredrik Ingvarson, Kjell O. Jeppson:
Evaluation of using active circuitry for substrate noise suppression.
449-452
Electronic Edition (ACM DL) BibTeX
- Hamid Noori, Maziar Goudarzi, Koji Inoue, Kazuaki Murakami:
The effect of temperature on cache size tuning for low energy embedded systems.
453-456
Electronic Edition (ACM DL) BibTeX
- Samuel Evain, Jean-Philippe Diguet:
Efficient space-time noc path allocation based on mutual exclusion and pre-reservation.
457-460
Electronic Edition (ACM DL) BibTeX
- Zhentao Yu, Marios C. Papaefthymiou, Xun Liu:
Skew spreading for peak current reduction.
461-464
Electronic Edition (ACM DL) BibTeX
- Shigetoshi Nakatake, Zohreh Karimi, Taraneh Taghavi, Majid Sarrafzadeh:
Block placement to ensure channel routability.
465-468
Electronic Edition (ACM DL) BibTeX
- Manuel Barros, Jorge Guilherme, Nuno Horta:
GA-SVM feasibility model and optimization kernel applied to analog IC design automation.
469-472
Electronic Edition (ACM DL) BibTeX
- Xinjie Wei, Yici Cai, Xianlong Hong:
Physical aware clock skew rescheduling.
473-476
Electronic Edition (ACM DL) BibTeX
- Rachit Kumar Gupta, Vikas Narang, H. M. Roopashree, Vinod Menezes:
A low-power 333Mbps mobile-double data rate output driver with adaptive feedback to minimize overshoots and undershoots.
477-480
Electronic Edition (ACM DL) BibTeX
- Koji Ohashi, Mineo Kaneko:
Extended register-sharing in the synthesis of dual-rail two-phase asynchronous datapath.
481-484
Electronic Edition (ACM DL) BibTeX
- Raffaella Gentilini, Klaus Schneider, Alexander Dreyer:
Three-valued automated reasoning on analog properties.
485-488
Electronic Edition (ACM DL) BibTeX
- Olga Golubeva, Mirko Loghi, Massimo Poncino:
On the energy efficiency of synchronization primitives for shared-memory single-chip multiprocessors.
489-492
Electronic Edition (ACM DL) BibTeX
- Daniel Große, Rüdiger Ebendt, Rolf Drechsler:
Improvements for constraint solving in the systemc verification library.
493-496
Electronic Edition (ACM DL) BibTeX
- Hamed Aminzadeh, Mohammad Danaie:
Systematic design of two-stage operational amplifiers based on settling time and open-loop constraints.
497-500
Electronic Edition (ACM DL) BibTeX
- Andrea Calimera, Antonio Pullini, Ashoka Visweswara Sathanur, Luca Benini, Alberto Macii, Enrico Macii, Massimo Poncino:
Design of a family of sleep transistor cells for a clustered power-gating flow in 65nm technology.
501-504
Electronic Edition (ACM DL) BibTeX
- Marcello Mura, Marco Paolieri, Luca Negri, Mariagiovanna Sami:
StateCharts to systemc: a high level hardware simulation approach.
505-508
Electronic Edition (ACM DL) BibTeX
- Marco Mantovani, Simone Leardini, Martino Ruggiero, Andrea Acquaviva, Luca Benini:
A lightweight parallel java execution environment for embedded multiprocessor systems-on-chip.
509-512
Electronic Edition (ACM DL) BibTeX
- Shiho Hagiwara, Takumi Uezono, Takashi Sato, Kazuya Masu:
Improvement of power distribution network using correlation-based regression analysis.
513-516
Electronic Edition (ACM DL) BibTeX
- Deniz Dal, Nazanin Mansouri:
A high-level register optimization technique for minimizing leakage and dynamic power.
517-520
Electronic Edition (ACM DL) BibTeX
- Hamid Reza Kheirabadi, Morteza Saheb Zamani:
An efficient net ordering algorithm for buffer insertion.
521-524
Electronic Edition (ACM DL) BibTeX
- Jia Wang, Ming-Yang Kao, Hai Zhou:
Address generation for nanowire decoders.
525-528
Electronic Edition (ACM DL) BibTeX
- Kiyoo Itoh, Masanao Yamaoka, Takayuki Kawahara:
Low-voltage limitations of deep-sub-100-nm CMOS LSIs: view of memory designers.
529-533
Electronic Edition (ACM DL) BibTeX
Arithmetic and coding
Routing and buffer insertion
- Kristofer Vorwerk, Andrew A. Kennings, Doris T. Chen, Laleh Behjat:
Floorplan repair using dynamic whitespace management.
552-557
Electronic Edition (ACM DL) BibTeX
- Ali Jahanian, Morteza Saheb Zamani:
Improved timing closure by early buffer planning in floor-placement design flow.
558-563
Electronic Edition (ACM DL) BibTeX
- Ou He, Sheqin Dong, Jinian Bian, Yuchun Ma, Xianlong Hong:
An effective buffer planning algorithm for IP based fixed-outline SOC placement.
564-569
Electronic Edition (ACM DL) BibTeX
- Yue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong Hong:
New timing and routability driven placement algorithms for FPGA synthesis.
570-575
Electronic Edition (ACM DL) BibTeX
Power estimation and modeling
- Chia-Chien Weng, Ching-Shang Yang, Shi-Yu Huang:
RT-level vector selection for realistic peak power simulation.
576-581
Electronic Edition (ACM DL) BibTeX
- Yosuke Takahashi, Yukihide Kohira, Atsushi Takahashi:
A fast clock scheduling for peak power reduction in LSI.
582-587
Electronic Edition (ACM DL) BibTeX
- Prashant Agrawal, R. Srinivasa, Ajit N. Oke, Saurabh Vijay:
A path based modeling approach for dynamic power estimation.
588-593
Electronic Edition (ACM DL) BibTeX
- Kyungsu Kang, Jungsoo Kim, Heejun Shim, Chong-Min Kyung:
Software power estimation using IPI(inter-prefetch interval) power model for advanced off-the-shelf processor.
594-599
Electronic Edition (ACM DL) BibTeX
- Georges G. E. Gielen:
Future trends for wireless communication frontends in nanometer CMOS.
600-605
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:13:51 2009
by Michael Ley (ley@uni-trier.de)
