Andreas Burg

2008
14	EE	Christoph Studer, Andreas Burg, Helmut Bölcskei: Soft-output sphere decoding: algorithms and VLSI implementation. IEEE Journal on Selected Areas in Communications 26(2): 290-300 (2008)
13	EE	Simon Haene, David Perels, Andreas Burg: A Real-Time 4-Stream MIMO-OFDM Transceiver: System Design, FPGA Implementation, and Characterization. IEEE Journal on Selected Areas in Communications 26(6): 877-889 (2008)
2007
12	EE	C. Hess, Markus Wenk, Andreas Burg, Peter Luethi, Christoph Studer, Norbert Felber, Wolfgang Fichtner: Reduced-complexity mimo detector with close-to ml error rate performance. ACM Great Lakes Symposium on VLSI 2007: 200-203
11	EE	Simon Haene, Andreas Burg, Peter Luethi, Norbert Felber, Wolfgang Fichtner: FFT Processor for OFDM Channel Estimation. ISCAS 2007: 1417-1420
10	EE	Peter Luethi, Andreas Burg, Simon Haene, David Perels, Norbert Felber, Wolfgang Fichtner: VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition. ISCAS 2007: 1421-1424
9	EE	Andreas Burg, Simon Haene, Wolfgang Fichtner, Markus Rupp: Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation. ISCAS 2007: 3530-3533
8	EE	Andreas Burg, Dominik Seethaler, Gerald Matz: VLSI Implementation of a Lattice-Reduction Algorithm for Multi-Antenna Broadcast Precoding. ISCAS 2007: 673-676
2006
7	EE	Andreas Burg, Moritz Borgmann, Markus Wenk, Christoph Studer, Helmut Bölcskei: Advanced receiver algorithms for MIMO wireless communications. DATE 2006: 593-598
6	EE	Andreas Burg, Simon Haene, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner: Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems. ISCAS 2006
5	EE	Markus Wenk, M. Zellweger, Andreas Burg, Norbert Felber, Wolfgang Fichtner: K-best MIMO detection VLSI architectures achieving up to 424 Mbps. ISCAS 2006
4	EE	Simon Haene, Andreas Burg, David Perels, Peter Luethi, Norbert Felber, Wolfgang Fichtner: Silicon implementation of an MMSE-based soft demapper for MIMO-BICM. ISCAS 2006
2004
3	EE	Frank K. Gürkaynak, Andreas Burg, Norbert Felber, Wolfgang Fichtner, D. Gasser, F. Hug, Hubert Kaeslin: A 2 Gb/s balanced AES crypto-chip implementation. ACM Great Lakes Symposium on VLSI 2004: 39-44
2003
2	EE	Andreas Burg, Frank K. Gürkaynak, Hubert Kaeslin, Wolfgang Fichtner: Variable delay ripple carry adder with carry chain interrupt detection. ISCAS (5) 2003: 113-116
1	EE	Markus Rupp, Andreas Burg, Eric Beck: Rapid prototyping for wireless designs: the five-ones approach. Signal Processing 83(7): 1427-1444 (2003)

Coauthor Index

1	Eric Beck	[1]
2	Helmut Bölcskei	[7] [14]
3	Moritz Borgmann	[7]
4	Norbert Felber	[3] [4] [5] [6] [10] [11] [12]
5	Wolfgang Fichtner	[2] [3] [4] [5] [6] [9] [10] [11] [12]
6	D. Gasser	[3]
7	Frank K. Gürkaynak	[2] [3]
8	Simon Haene	[4] [6] [9] [10] [11] [13]
9	C. Hess	[12]
10	F. Hug	[3]
11	Hubert Kaeslin	[2] [3]
12	Peter Luethi	[4] [6] [10] [11] [12]
13	Gerald Matz	[8]
14	David Perels	[4] [6] [10] [13]
15	Markus Rupp	[1] [9]
16	Dominik Seethaler	[8]
17	Christoph Studer	[7] [12] [14]
18	Markus Wenk	[5] [7] [12]
19	M. Zellweger	[5]