| 2007 |
|---|
| 6 | EE | Chunyue Liu,
Xiaolang Yan,
Xing Qin:
An optimized linear skewing interleave scheme for on-chip multi-access memory systems.
ACM Great Lakes Symposium on VLSI 2007: 8-13 |
| 5 | EE | Jianying Peng,
Xing Qin,
Dexian Li,
Xiaolang Yan,
Xiexiong Chen:
An Efficient SIMD Architecture with Parallel Memory for 2D Cosine Transforms of Video Coding.
ASAP 2007: 260-265 |
| 4 | | Chunyue Liu,
Xing Qin,
Xiaolang Yan:
Explicit data organization SIMD instruction set architecture for media processors.
Parallel and Distributed Computing and Networks 2007: 212-217 |
| 2006 |
|---|
| 3 | EE | Jianying Peng,
Xing Qin,
Jian Yang,
Xiaolang Yan,
Xiexiong Chen:
A Programmable Bitstream Parser for Multiple Video Coding Standards.
ICICIC (3) 2006: 609-612 |
| 2005 |
|---|
| 2 | EE | Xing Qin,
Xiaolang Yan,
Haitong Ge,
Ye Yang:
A simplified algorithm of JPEG2000 rate control for VLSI implementation.
ISCAS (6) 2005: 6316-6319 |
| 2004 |
|---|
| 1 | | Xing Qin,
Xiaolang Yan,
Chong-Peng Yang,
Yang Ye:
Tiling artifact reduction for JPEG2000 image at low bit-rate.
ICME 2004: 1419-1422 |
