2007 |
13 | EE | Philippe Magarshack:
Design challenges in 45nm and below: DFM, low-power and design for reliability.
ACM Great Lakes Symposium on VLSI 2007: 1 |
12 | EE | Marco Casale-Rossi,
Andrzej J. Strojwas,
Robert C. Aitken,
Antun Domic,
Carlo Guardiani,
Philippe Magarshack,
Douglas Pattullo,
Joseph Sawicki:
DFM/DFY: should you trust the surgeon or the family doctor?
DATE 2007: 439-442 |
2006 |
11 | EE | G. Singer,
Philippe Magarshack,
Dennis Buss,
F.-C. Hsu,
H.-K. Kang:
"The IC nanometer race -- what will it take to win?".
DAC 2006: 77-78 |
2004 |
10 | EE | Yervant Zorian,
Dimitris Gizopoulos,
Cary Vandenberg,
Philippe Magarshack:
Guest Editors' Introduction: Design for Yield and Reliability.
IEEE Design & Test of Computers 21(3): 177-182 (2004) |
2003 |
9 | EE | Abbas El Gamal,
Ivo Bolsens,
Andy Broom,
Christopher Hamlin,
Philippe Magarshack,
Zvi Or-Bach,
Lawrence T. Pileggi:
Fast, cheap and under control: the next implementation fabric.
DAC 2003: 354-355 |
8 | EE | Philippe Magarshack,
Pierre G. Paulin:
System-on-chip beyond the nanometer wall.
DAC 2003: 419-424 |
7 | EE | Philippe Magarshack:
Invited Keynote: Building Yield into Systems-on-Chips for Nanometer Technologies.
VTS 2003: 4 |
2002 |
6 | EE | Philippe Magarshack:
Systems-on-chip needs for embedded software development: an industrial perspective.
LCTES-SCOPES 2002: 1 |
5 | | Philippe Magarshack:
SoC's Trends and Challenges going to 0.10µm.
MTDT 2002 |
4 | EE | Philippe Magarshack:
Improving SoC Design Quality through a Reproducible Design Flow.
IEEE Design & Test of Computers 19(1): 76-83 (2002) |
2001 |
3 | EE | Georges G. E. Gielen,
Mike Sottak,
Mike Murray,
Linda Kaye,
Maria del Mar Hershenson,
Kenneth S. Kundert,
Philippe Magarshack,
Akria Matsuzawa,
Ronald A. Rohrer,
Ping Yang:
Panel: When Will the Analog Design Flow Catch Up with Digital Methodology?
DAC 2001: 419 |
2 | EE | Georges G. E. Gielen,
B. Sorensen,
H. Casier,
Philippe Magarshack,
J. Rodriguez:
Design challenges and emerging EDA solutions in mixed-signal IC design.
DATE 2001: 694-695 |
1 | EE | Philippe Magarshack:
Quality of SoC Designs through Quality of the Design Flow: Status and Needs.
ISQED 2001: 241- |