| |
| 2009 | ||
|---|---|---|
| 4 | EE | Karthikeyan Lingasubramanian, Sanjukta Bhanja: An Error Model to Study the Behavior of Transient Errors in Sequential Circuits. VLSI Design 2009: 485-490 |
| 2007 | ||
| 3 | EE | Karthikeyan Lingasubramanian, Sanjukta Bhanja: Probabilistic maximum error modeling for unreliable logic circuits. ACM Great Lakes Symposium on VLSI 2007: 223-226 |
| 2006 | ||
| 2 | EE | Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan: A stimulus-free graphical probabilistic switching model for sequential circuits using dynamic bayesian networks. ACM Trans. Design Autom. Electr. Syst. 11(3): 773-796 (2006) |
| 2005 | ||
| 1 | EE | Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. Ranganathan: Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks. VLSI Design 2005: 586-591 |
| 1 | Sanjukta Bhanja | [1] [2] [3] [4] |
| 2 | N. Ranganathan (Nagarajan Ranganathan) | [1] [2] |