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Yue Zhuo

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2008
3EEHao Li, Yue Zhuo: Criticality history guided FPGA placement algorithm for timing optimization. ACM Great Lakes Symposium on VLSI 2008: 267-272
2007
2EEYue Zhuo, Hao Li, Qiang Zhou, Yici Cai, Xianlong Hong: New timing and routability driven placement algorithms for FPGA synthesis. ACM Great Lakes Symposium on VLSI 2007: 570-575
2006
1EEYue Zhuo, Hao Li, Saraju P. Mohanty: A Congestion Driven Placement Algorithm for FPGA Synthesis. FPL 2006: 1-4

Coauthor Index

1Yici Cai [2]
2Xianlong Hong [2]
3Hao Li [1] [2] [3]
4Saraju P. Mohanty [1]
5Qiang Zhou [2]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)