| 2007 |
|---|
| 4 | EE | Mehrdad Najibi,
Kamran Saleh,
Hossein Pedram:
Using standard asic back-end for qdi asynchronous circuits: dealing with isochronic fork constraint.
ACM Great Lakes Symposium on VLSI 2007: 299-304 |
| 2005 |
|---|
| 3 | EE | Kamran Saleh,
Mehrdad Najibi,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
A novel clock generation scheme for globally asynchronous locally synchronous systems: an FPGA-validated approach.
ACM Great Lakes Symposium on VLSI 2005: 296-301 |
| 2 | EE | Mehrdad Najibi,
Kamran Saleh,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
Prototyping globally asynchronous locally synchronous circuits on commercial synchronous FPGAs (abstract only).
FPGA 2005: 269 |
| 1 | EE | Mehrdad Najibi,
Kamran Saleh,
Mohsen Naderi,
Hossein Pedram,
Mehdi Sedighi:
Prototyping Globally Asynchronous Locally Synchronous Circuits on Commercial Synchronous FPGAs.
IEEE International Workshop on Rapid System Prototyping 2005: 63-69 |
