Philippe Coussy

2007
16	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: A design methodology for space-time adapter. ACM Great Lakes Symposium on VLSI 2007: 347-352
15	EE	Caaliph Andriamisaina, Emmanuel Casseau, Philippe Coussy: Synthesis of Multimode digital signal processing systems. AHS 2007: 318-325
14	EE	Cyrille Chavet, Caaliph Andriamisaina, Philippe Coussy, Emmanuel Casseau, Emmanuel Juin, Pascal Urard, Eric Martin: A design flow dedicated to multi-mode architectures for DSP applications. ICCAD 2007: 604-611
13	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver. ISCAS 2007: 2946-2949
12	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: A Methodology for Efficient Space-Time Adapter Design Space Exploration: A Case Study of an Ultra Wide Band Interleaver CoRR abs/0706.1692: (2007)
11	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: A Design Methodology for Space-Time Adapter CoRR abs/0706.2732: (2007)
10	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: Méthodologie de modélisation et d'implémentation d'adaptateurs spatio-temporels CoRR abs/0706.2824: (2007)
9	EE	Cyrille Chavet, Philippe Coussy, Pascal Urard, Eric Martin: Application of a design space exploration tool to enhance interleaver generation CoRR abs/0706.3009: (2007)
8	EE	Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin: Constrained algorithmic IP design for system-on-chip. Integration 40(2): 94-105 (2007)
2006
7	EE	Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric Martin: A formal method for hardware IP design and integration under I/O and timing constraints. ACM Trans. Embedded Comput. Syst. 5(1): 29-53 (2006)
6	EE	Philippe Coussy, Gwenolé Corre, Pierre Bomel, Eric Senn, Eric Martin: High-level synthesis under I/O Timing and Memory constraints CoRR abs/cs/0605143: (2006)
5	EE	Gwenolé Corre, Philippe Coussy, Pierre Bomel, Eric Senn, Eric Martin: Synthèse Comportementale Sous Contraintes de Communication et de Placement Mémoire pour les composants du TDSI CoRR abs/cs/0605146: (2006)
2005
4	EE	L. Kriaa, S. Adriano, E. Vaumorin, R. Nouacer, F. Blanc, S. Pajaniardja, Philippe Coussy, Eric Martin, D. Heller, F. Thabet, Anne-Marie Fouilliart: SystemCmantic: A high level Modelling and Co-Design Framework. FDL 2005: 341-353
3	EE	Philippe Coussy, Gwenolé Corre, Eric Senn, Pierre Bomel, Eric Martin: High-level synthesis under I/O timing and memory constraints. ISCAS (1) 2005: 680-683
2003
2		Philippe Coussy, Adel Baganne, Eric Martin: Communication and Timing Constraints Analysis for IP Design and Integration. VLSI-SOC 2003: 38-43
2002
1	EE	Philippe Coussy, Adel Baganne, Eric Martin: A design methodology for IP integration. ISCAS (4) 2002: 711-714

Coauthor Index

1	S. Adriano	[4]
2	Caaliph Andriamisaina	[14] [15]
3	Adel Baganne	[1] [2] [7] [8]
4	F. Blanc	[4]
5	Pierre Bomel	[3] [5] [6] [7] [8]
6	Emmanuel Casseau	[7] [8] [14] [15]
7	Cyrille Chavet	[9] [10] [11] [12] [13] [14] [16]
8	Gwenolé Corre	[3] [5] [6]
9	Anne-Marie Fouilliart	[4]
10	D. Heller	[4]
11	Emmanuel Juin	[14]
12	L. Kriaa	[4]
13	Eric Martin	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [16]
14	R. Nouacer	[4]
15	S. Pajaniardja	[4]
16	Eric Senn	[3] [5] [6]
17	F. Thabet	[4]
18	Pascal Urard	[9] [10] [11] [12] [13] [14] [16]
19	E. Vaumorin	[4]