| 2009 |
|---|
| 11 | EE | Basavaraj Talwar,
Shailesh Kulkarni,
Bharadwaj Amrutur:
Latency, Power and Performance Trade-Offs in Network-on-Chips by Link Microarchitecture Exploration.
VLSI Design 2009: 163-168 |
| 2008 |
|---|
| 10 | EE | Jagdish Nayayan Pandey,
Bharadwaj Amrutur,
Sudhir S. Kudva:
Quadrature generation techniques for frequency multiplication based oscillators.
ISCAS 2008: 440-443 |
| 9 | EE | Madan Arvind,
Bharadwaj Amrutur:
Power reduction in on-chip interconnection network by serialization.
ISLPED 2008: 201-204 |
| 8 | EE | Mohammed Shareef I,
Pradeep Nair,
Bharadwaj Amrutur:
Energy Reduction in SRAM using Dynamic Voltage and Frequency Management.
VLSI Design 2008: 503-508 |
| 7 | EE | Janakiraman Viraraghavan,
Bishnu Prasad Das,
Bharadwaj Amrutur:
Voltage and Temperature Scalable Standard Cell Leakage Models Based on Stacks for Statistical Leakage Characterization.
VLSI Design 2008: 667-672 |
| 2007 |
|---|
| 6 | EE | R. G. Raghavendra,
Bharadwaj Amrutur:
Area efficient loop filter design for charge pump phase locked loop.
ACM Great Lakes Symposium on VLSI 2007: 148-151 |
| 5 | EE | Kaushik Rajan,
R. Govindarajan,
Bharadwaj Amrutur:
Dynamic Cache Placement with Two-level Mapping to Reduce Conflict Misses.
PACT 2007: 422 |
| 4 | EE | Jagdish Nayayan Pandey,
Sudhir S. Kudva,
Bharadwaj Amrutur:
A Low Power Frequency Multiplication Technique for ZigBee Transciever.
VLSI Design 2007: 150-155 |
| 3 | EE | K. R. Viveka,
Abhilasha Kawle,
Bharadwaj Amrutur:
Low Power Pipelined TCAM Employing Mismatch Dependent Power Allocation Technique.
VLSI Design 2007: 638-646 |
| 2 | EE | Satish Yada,
Bharadwaj Amrutur,
Rubin A. Parekhji:
Modified Stability Checking for On-line Error Detection.
VLSI Design 2007: 787-792 |
| 2006 |
|---|
| 1 | EE | Rajesh Vivekanandham,
Bharadwaj Amrutur,
R. Govindarajan:
A scalable low power issue queue for large instruction window processors.
ICS 2006: 167-176 |
