| |
| 2008 | ||
|---|---|---|
| 2 | EE | Yanming Jia, Yici Cai, Xianlong Hong: Full-chip routing system for reducing Cu CMP & ECP variation. SBCCI 2008: 10-15 |
| 2007 | ||
| 1 | EE | Yanming Jia, Yici Cai, Xianlong Hong: Dummy fill aware buffer insertion during routing. ACM Great Lakes Symposium on VLSI 2007: 31-36 |
| 1 | Yici Cai | [1] [2] |
| 2 | Xianlong Hong | [1] [2] |