| 2008 |
|---|
| 68 | EE | Mathieu Luisier,
Gerhard Klimeck,
Andreas Schenk,
Wolfgang Fichtner,
Timothy B. Boykin:
A Parallel Sparse Linear Solver for Nearest-Neighbor Tight-Binding Problems.
Euro-Par 2008: 790-800 |
| 67 | EE | Christoph Studer,
Peter Luethi,
Wolfgang Fichtner:
VLSI architecture for data-reduced steering matrix feedback in MIMO systems.
ISCAS 2008: 300-303 |
| 66 | EE | Christian Senning,
Christoph Studer,
Peter Luethi,
Wolfgang Fichtner:
Hardware-efficient steering matrix computation architecture for MIMO communication systems.
ISCAS 2008: 304-307 |
| 65 | EE | Peter Luethi,
Markus Wenk,
Thomas Koch,
Wolfgang Fichtner,
Michael Lerjen,
Norbert Felber:
Multi-user MIMO testbed.
WINTECH 2008: 109-110 |
| 64 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Transmission Gates Combined With Level-Restoring CMOS Gates Reduce Glitches in Low-Power Low-Frequency Multipliers.
IEEE Trans. VLSI Syst. 16(7): 830-836 (2008) |
| 2007 |
|---|
| 63 | EE | C. Hess,
Markus Wenk,
Andreas Burg,
Peter Luethi,
Christoph Studer,
Norbert Felber,
Wolfgang Fichtner:
Reduced-complexity mimo detector with close-to ml error rate performance.
ACM Great Lakes Symposium on VLSI 2007: 200-203 |
| 62 | EE | Simon Haene,
Andreas Burg,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
FFT Processor for OFDM Channel Estimation.
ISCAS 2007: 1417-1420 |
| 61 | EE | Peter Luethi,
Andreas Burg,
Simon Haene,
David Perels,
Norbert Felber,
Wolfgang Fichtner:
VLSI Implementation of a High-Speed Iterative Sorted MMSE QR Decomposition.
ISCAS 2007: 1421-1424 |
| 60 | EE | David Perels,
Christoph Studer,
Wolfgang Fichtner:
Implementation of a Low-Complexity Frame-Start Detection Algorithm for MIMO Systems.
ISCAS 2007: 1903-1906 |
| 59 | EE | Andreas Burg,
Simon Haene,
Wolfgang Fichtner,
Markus Rupp:
Regularized Frequency Domain Equalization Algorithm and its VLSI Implementation.
ISCAS 2007: 3530-3533 |
| 58 | EE | Marc Simon Wegmueller,
Martin Hediger,
Thomas Kaufmann,
Felix Bürgin,
Wolfgang Fichtner:
Wireless Implant Communications for Biomedical Monitoring Sensor Network.
ISCAS 2007: 809-812 |
| 57 | EE | Stefan Röllin,
Wolfgang Fichtner:
Improving the Accuracy of GMRes with Deflated Restarting.
SIAM J. Scientific Computing 30(1): 232-245 (2007) |
| 2006 |
|---|
| 56 | EE | Frank K. Gürkaynak,
Stephan Oetiker,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner:
GALS at ETH Zurich: Success or Failure.
ASYNC 2006: 150-159 |
| 55 | EE | Felix Bürgin,
Flavio Carbognani,
Martin Hediger,
Hektor Meier,
Robert Meyer-Piening,
Rafael Santschi,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner:
Low-power architectural trade-offs in a VLSI implementation of an adaptive hearing aid algorithm.
DAC 2006: 558-561 |
| 54 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Two-phase resonant clocking for ultra-low-power hearing aid applications.
DATE 2006: 73-78 |
| 53 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
42% power savings through glitch-reducing clocking strategy in a hearing aid application.
ISCAS 2006 |
| 52 | EE | Andreas Burg,
Simon Haene,
David Perels,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
Algorithm and VLSI architecture for linear MMSE detection in MIMO-OFDM systems.
ISCAS 2006 |
| 51 | EE | Markus Wenk,
M. Zellweger,
Andreas Burg,
Norbert Felber,
Wolfgang Fichtner:
K-best MIMO detection VLSI architectures achieving up to 424 Mbps.
ISCAS 2006 |
| 50 | EE | Simon Haene,
Andreas Burg,
David Perels,
Peter Luethi,
Norbert Felber,
Wolfgang Fichtner:
Silicon implementation of an MMSE-based soft demapper for MIMO-BICM.
ISCAS 2006 |
| 49 | EE | Frank K. Gürkaynak,
Stephan Oetiker,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner:
Design Challenges for a Differential-Power-Analysis Aware GALS-based AES Crypto ASIC.
Electr. Notes Theor. Comput. Sci. 146(2): 133-149 (2006) |
| 48 | EE | Marco Buzzo,
Mauro Ciappa,
Wolfgang Fichtner:
Characterization of photonic devices by secondary electron potential contrast.
Microelectronics Reliability 46(9-11): 1536-1541 (2006) |
| 47 | EE | Alberto Castellazzi,
Mauro Ciappa,
Wolfgang Fichtner,
G. Lourdel,
Michel Mermet-Guyennet:
Compact modelling and analysis of power-sharing unbalances in IGBT-modules used in traction applications.
Microelectronics Reliability 46(9-11): 1754-1759 (2006) |
| 46 | EE | D. Barlini,
Mauro Ciappa,
Alberto Castellazzi,
Michel Mermet-Guyennet,
Wolfgang Fichtner:
New technique for the measurement of the static and of the transient junction temperature in IGBT devices under operating conditions.
Microelectronics Reliability 46(9-11): 1772-1777 (2006) |
| 45 | EE | S. C. Brugger,
Andreas Schenk,
Wolfgang Fichtner:
Moments of the Inverse Scattering Operator of the Boltzmann Equation: Theory and Applications.
SIAM Journal of Applied Mathematics 66(4): 1209-1226 (2006) |
| 2005 |
|---|
| 44 | EE | Flavio Carbognani,
Felix Bürgin,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
Two-Phase Clocking and a New Latch Design for Low-Power Portable Applications.
PATMOS 2005: 446-455 |
| 43 | EE | Marco Buzzo,
Mauro Ciappa,
Maria Stangoni,
Wolfgang Fichtner:
Two-dimensional Dopant Profiling and Imaging of 4H Silicon Carbide Devices by Secondary Electron Potential Contrast.
Microelectronics Reliability 45(9-11): 1499-1504 (2005) |
| 42 | EE | Maria Stangoni,
Mauro Ciappa,
Wolfgang Fichtner:
Assessment of the Analytical Capabilities of Scanning Capacitance and Scanning Spreading Resistance Microscopy Applied to Semiconductor Devices.
Microelectronics Reliability 45(9-11): 1532-1537 (2005) |
| 41 | EE | Mauro Ciappa,
Wolfgang Fichtner,
T. Kojima,
Y. Yamada,
Y. Nishibe:
Extraction of Accurate Thermal Compact Models for Fast Electro-Thermal Simulation of IGBT Modules in Hybrid Electric Vehicles.
Microelectronics Reliability 45(9-11): 1694-1699 (2005) |
| 2004 |
|---|
| 40 | EE | Frank K. Gürkaynak,
Andreas Burg,
Norbert Felber,
Wolfgang Fichtner,
D. Gasser,
F. Hug,
Hubert Kaeslin:
A 2 Gb/s balanced AES crypto-chip implementation.
ACM Great Lakes Symposium on VLSI 2004: 39-44 |
| 2003 |
|---|
| 39 | EE | Thomas Villiger,
Hubert Kaeslin,
Frank K. Gürkaynak,
Stephan Oetiker,
Wolfgang Fichtner:
Self-Timed Ring for Globally-Asynchronous Locally-Synchronous Systems.
ASYNC 2003: 141-150 |
| 38 | EE | Andreas Burg,
Frank K. Gürkaynak,
Hubert Kaeslin,
Wolfgang Fichtner:
Variable delay ripple carry adder with carry chain interrupt detection.
ISCAS (5) 2003: 113-116 |
| 37 | EE | Clemens Czernohous,
Wolfgang Fichtner,
Daniel Veit,
Christof Weinhardt:
Management decision support using long-term market simulation.
Inf. Syst. E-Business Management 1(4): 405-423 (2003) |
| 36 | EE | F. M. Bufler,
Andreas Schenk,
Wolfgang Fichtner:
Proof of a simple time-step propagation scheme for Monte Carlo simulation.
Mathematics and Computers in Simulation 62(3-6): 323-326 (2003) |
| 35 | EE | Maria Stangoni,
Mauro Ciappa,
Wolfgang Fichtner:
A New Procedure to Define the Zero-Field Condition and to Delineate pn-Junctions in Silicon Devices by Scanning Capacitance Microscopy.
Microelectronics Reliability 43(9-11): 1651-1656 (2003) |
| 34 | EE | G. Mura,
Massimo Vanzi,
Maria Stangoni,
Mauro Ciappa,
Wolfgang Fichtner:
On the behaviour of the selective iodine-based gold etch for the failure analysis of aged optoelectronic devices.
Microelectronics Reliability 43(9-11): 1771-1776 (2003) |
| 2002 |
|---|
| 33 | EE | Thomas Villiger,
Stephan Oetiker,
Frank K. Gürkaynak,
Norbert Felber,
Hubert Kaeslin,
Wolfgang Fichtner:
A Functional Test Methodology for Globally-Asynchronous Locally-Synchronous Systems.
ASYNC 2002: 181-189 |
| 32 | EE | A. K. Lutz,
J. Treichler,
Frank K. Gürkaynak,
Hubert Kaeslin,
G. Basler,
Antonia Erni,
S. Reichmuth,
P. Rommens,
Stephan Oetiker,
Wolfgang Fichtner:
2Gbit/s Hardware Realizations of RIJNDAEL and SERPENT: A Comparative Analysis.
CHES 2002: 144-158 |
| 31 | EE | Wolfgang Stadler,
K. Esmark,
Harald Gossner,
M. Streibl,
M. Wendel,
Wolfgang Fichtner,
Dionyz Pogany,
Martin Litzenberger,
E. Gornik:
Device Simulation and Backside Laser Interferometry--Powerful Tools for ESD Protection Development.
Microelectronics Reliability 42(9-11): 1267-1274 (2002) |
| 30 | EE | Mauro Ciappa,
Flavio Carbognani,
P. Cova,
Wolfgang Fichtner:
A Novel Thermomechanics -Based Lifetime Prediction Model for Cycle Fatigue Failure Mechanisms in Power Semiconductors.
Microelectronics Reliability 42(9-11): 1653-1658 (2002) |
| 29 | EE | Maria Stangoni,
Mauro Ciappa,
Marco Buzzo,
M. Leicht,
Wolfgang Fichtner:
Simulation and Experimental Validation of Scanning Capacitance Microscopy Measurements across Low-doped Epitaxial PN-Junction.
Microelectronics Reliability 42(9-11): 1701-1706 (2002) |
| 2001 |
|---|
| 28 | EE | J. Thalheim,
Norbert Felber,
Wolfgang Fichtner:
A new approach for controlling series-connected IGBT modules.
ISCAS (3) 2001: 69-72 |
| 27 | EE | Olaf Schenk,
Klaus Gärtner,
Wolfgang Fichtner,
Andreas Stricker:
PARDISO: a high-performance serial and parallel sparse linear solver in semiconductor device simulation.
Future Generation Comp. Syst. 18(1): 69-78 (2001) |
| 26 | EE | Manfred Stadler,
Markus Thalmann,
Thomas Röwer,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner:
Design and Verification of a Stack Processor Virtual Component.
IEEE Micro 21(2): 69-80 (2001) |
| 25 | EE | K. Esmark,
Wolfgang Stadler,
M. Wendel,
Harald Gossner,
X. Guggenmos,
Wolfgang Fichtner:
Advanced 2D/3D ESD device simulation - a powerful tool already used in a pre-Si phase.
Microelectronics Reliability 41(11): 1761-1770 (2001) |
| 24 | EE | Michael Schenkel,
Paul Pfäffli,
Wolfgang Wilkening,
D. Aemmer,
Wolfgang Fichtner:
Substrate potential shift due to parasitic minority carrier injection in smart-power ICs: measurements and full-chip 3D device simulation.
Microelectronics Reliability 41(6): 815-822 (2001) |
| 23 | | H. Yabuhara,
Mauro Ciappa,
Wolfgang Fichtner:
Diamond-Coated Cantilevers for Scanning Capacitance Microscopy Applications.
Microelectronics Reliability 41(9-10): 1459-1463 (2001) |
| 2000 |
|---|
| 22 | EE | Jens Muttersbach,
Thomas Villiger,
Wolfgang Fichtner:
Practical Design of Globally-Asynchronous Locally-Synchronous Systems.
ASYNC 2000: 52- |
| 1999 |
|---|
| 21 | | Olaf Schenk,
Klaus Gärtner,
Wolfgang Fichtner:
Scalable Parallel Sparse Factorization with Left-Right Looking Strategy on Shared Memory Multoprocessors.
HPCN Europe 1999: 221-230 |
| 20 | | Olaf Schenk,
Klaus Gärtner,
Wolfgang Fichtner:
Application of Parallel Sparse Direct Methods in Semiconductor Device and Process Simulation.
ISHPC 1999: 206-219 |
| 19 | | Manfred Stadler,
Thomas Röwer,
Hubert Kaeslin,
Norbert Felber,
Wolfgang Fichtner,
Markus Thalmann:
Functional verification of intellectual properties (IP): a simulation-based solution for an application-specific instruction-set processor.
ITC 1999: 414-420 |
| 1997 |
|---|
| 18 | EE | P. Douglas Yoder,
Klaus Gärtner,
Ulrich Krumbein,
Wolfgang Fichtner:
Optimized terminal current calculation for Monte Carlo device simulation.
IEEE Trans. on CAD of Integrated Circuits and Systems 16(10): 1082-1087 (1997) |
| 1995 |
|---|
| 17 | | Arno Liegmann,
Wolfgang Fichtner:
Solving Large Sparse Linear Systems in a Distributed Computing Environment.
PPSC 1995: 496-497 |
| 1993 |
|---|
| 16 | | H. Bonnenberg,
Andreas Curiger,
Norbert Felber,
Hubert Kaeslin,
R. Zimmermann,
Wolfgang Fichtner:
VINCI: Secure Test of a VLSI High-Speed Encryption System.
ITC 1993: 782-790 |
| 15 | EE | Nancy Hitschfeld-Kahler,
Paolo Conti,
Wolfgang Fichtner:
Mixed element trees: a generalization of modified octrees for the generation of meshes for the simulation of complex 3-D semiconductor device structures.
IEEE Trans. on CAD of Integrated Circuits and Systems 12(11): 1714-1725 (1993) |
| 1992 |
|---|
| 14 | EE | Steven J. Seda,
Marc G. R. Degrauwe,
Wolfgang Fichtner:
Lazy-expansion symbolic expression approximation in SYNAP.
ICCAD 1992: 310-317 |
| 13 | | Nancy Hitschfeld,
Stephan Müller,
Wolfgang Fichtner:
Generation of 3-D Delaunay Meshes for Complex Geometries using Iterative Refinement.
IFIP Congress (1) 1992: 388-394 |
| 12 | EE | Stephan Müller,
Kevin Kells,
Wolfgang Fichtner:
Automatic rectangle-based adaptive mesh generation without obtuse angles.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(7): 855-863 (1992) |
| 11 | EE | Hans-Rudolf Heeb,
Wolfgang Fichtner:
A module generator based on the PQ-tree algorithm.
IEEE Trans. on CAD of Integrated Circuits and Systems 11(7): 876-884 (1992) |
| 1991 |
|---|
| 10 | EE | Claude Pommerell,
Wolfgang Fichtner:
PILS: an iterative linear solver package for ill-conditioned systems.
SC 1991: 588-599 |
| 9 | EE | Gernot Heiser,
Claude Pommerell,
Jürgen Weis,
Wolfgang Fichtner:
Three-dimensional numerical semiconductor device simulation: algorithms, architectures, results.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1218-1230 (1991) |
| 8 | EE | Paolo Conti,
Nancy Hitschfeld-Kahler,
Wolfgang Fichtner:
Omega-an octree-based mixed element grid allocator for the simulation of complex 3-D device structures.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1231-1241 (1991) |
| 7 | EE | Josef F. Burgler,
William M. Coughran Jr.,
Wolfgang Fichtner:
An adaptive grid refinement strategy for the drift-diffusion equations.
IEEE Trans. on CAD of Integrated Circuits and Systems 10(10): 1251-1258 (1991) |
| 1989 |
|---|
| 6 | EE | Alexander Herrigel,
Wolfgang Fichtner:
An Analytic Optimization Technique for Placement of Macro-Cells.
DAC 1989: 376-381 |
| 5 | EE | William M. Coughran Jr.,
Wolfgang Fichtner,
Eric Grosse:
Extracting transistor changes from device simulations by gradient fitting.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(4): 380-394 (1989) |
| 4 | EE | Josef F. Burgler,
Randolph E. Bank,
Wolfgang Fichtner,
R. Kent Smith:
A new discretization scheme for the semiconductor current continuity equations.
IEEE Trans. on CAD of Integrated Circuits and Systems 8(5): 479-489 (1989) |
| 1986 |
|---|
| 3 | | Wolfgang Fichtner:
Design of VLSI Systems.
Embedded Systems 1986: 6-17 |
| 1985 |
|---|
| 2 | EE | Randolph E. Bank,
William M. Coughran Jr.,
Wolfgang Fichtner,
Eric Grosse,
Donald J. Rose,
R. Kent Smith:
Transient Simulation of Silicon Devices and Circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 436-451 (1985) |
| 1982 |
|---|
| 1 | EE | G. W. Taylor,
Wolfgang Fichtner,
J. G. Simmons:
A Description of MOS Internodal Capacitances for Transient Simulations.
IEEE Trans. on CAD of Integrated Circuits and Systems 1(4): 150-156 (1982) |
