| 2009 |
|---|
| 4 | EE | Zohreh Karimi,
Majid Sarrafzadeh:
Power aware placement for FPGAs with dual supply voltages.
ISQED 2009: 522-526 |
| 2007 |
|---|
| 3 | EE | Shigetoshi Nakatake,
Zohreh Karimi,
Taraneh Taghavi,
Majid Sarrafzadeh:
Block placement to ensure channel routability.
ACM Great Lakes Symposium on VLSI 2007: 465-468 |
| 2003 |
|---|
| 2 | EE | Elham Safi,
Zohreh Karimi,
Maghsoud Abbaspour,
Zainalabedin Navabi:
Utilizing Various ADL Facets for Instruction Level CPU Test.
MTV 2003: 38- |
| 1 | | Elham Safi,
Reihaneh Saberi,
Zohreh Karimi,
Zainalabedin Navabi:
Processor Testing Using an ADL Description and Genetic Algorithms.
VLSI-SOC 2003: 186- |
