Grigoris Dimitroulakos

2009
25	EE	Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration framework for coarse grained reconfigurable arrays. The Journal of Supercomputing 48(2): 115-151 (2009)
2007
24	EE	Grigoris Dimitroulakos, Nikos Kostaras, Michalis D. Galanis, Costas E. Goutis: Compiler assisted architectural exploration for coarse grained reconfigurable arrays. ACM Great Lakes Symposium on VLSI 2007: 164-167
23	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Improving performance and energy consumption in embedded microprocessor platforms with a flexible custom coprocessor data-path. ACM Great Lakes Symposium on VLSI 2007: 2-7
22	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Nikos Kostaras, Costas E. Goutis: A unified evaluation framework for coarse grained reconfigurable array architectures. Conf. Computing Frontiers 2007: 161-172
21	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Savings of Microprocessor Platforms with a Coarse-Grained Reconfigurable Data-Path. IPDPS 2007: 1-8
20	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Optimization of Embedded Applications in a Hybrid Reconfigurable Platform. PATMOS 2007: 352-362
19	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups and Energy Reductions From Mapping DSP Applications on an Embedded Reconfigurable System. IEEE Trans. VLSI Syst. 15(12): 1362-1366 (2007)
18	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Exploring the speedups of embedded microprocessor systems utilizing a high-performance coprocessor data-path. The Journal of Supercomputing 39(3): 251-271 (2007)
17	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture. The Journal of Supercomputing 40(2): 127-157 (2007)
2006
16	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic. IPDPS 2006
15	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures. IPDPS 2006
14	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware. IPDPS 2006
13	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Constantinos E. Goutis: Mapping DSP applications on processor/coarse-grain reconfigurable array architectures. ISCAS 2006
12	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Constantinos E. Goutis: Resource constrained modulo scheduling for coarse-grained reconfigurable arrays. ISCAS 2006
11	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Improvements from Partitioning Applications to FPGA Hardware in Embedded SoCs. The Journal of Supercomputing 35(2): 185-199 (2006)
10	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Partitioning Methodology for Heterogeneous Reconfigurable Functional Units. The Journal of Supercomputing 38(1): 17-34 (2006)
2005
9	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Alleviating the Data Memory Bandwidth Bottleneck in Coarse-Grained Reconfigurable Arrays. ASAP 2005: 161-168
8	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Speedups from Partitioning Critical Software Parts to Coarse-Grain Reconfigurable Hardware. ASAP 2005: 50-59
7	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Accelerating Applications by Mapping Critical Kernels on Coarse-Grain Reconfigurable Hardware in Hybrid Systems. FCCM 2005: 301-302
6		Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: Performance Improvements using Coarse-Grain Reconfigurable Logic in Embedded SoCs. FPL 2005: 630-635
5	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis: A Compiler Method for Memory-Conscious Mapping of Applications on Coarse-Grained Reconfigurable Architectures. IPDPS 2005
4	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Costas E. Goutis, Athanasios Milidonis: A high-throughput and memory efficient 2D discrete wavelet transform hardware architecture for JPEG2000 standard. ISCAS (1) 2005: 472-475
3	EE	Michalis D. Galanis, Grigoris Dimitroulakos, Costas E. Goutis: Performance Gains from Partitioning Embedded Applications in Processor-FPGA SoCs. PATMOS 2005: 247-256
2	EE	Grigoris Dimitroulakos, Michalis D. Galanis, Athanasios Milidonis, Constantinos E. Goutis: A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000. Integration 39(1): 1-11 (2005)
2004
1	EE	Athanasios Milidonis, Grigoris Dimitroulakos, Michalis D. Galanis, George Theodoridis, Constantinos E. Goutis, Francky Catthoor: An Automated C++ Code and Data Partitioning Framework for Data Management of Data-Intensive Applications. SCOPES 2004: 122-136

Coauthor Index

1	Francky Catthoor	[1]
2	Michalis D. Galanis	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25]
3	Constantinos E. Goutis (Costas E. Goutis)	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23] [24] [25]
4	Nikos Kostaras	[22] [24] [25]
5	Athanasios Milidonis	[1] [2] [4]
6	George Theodoridis	[1]