| |
| 2008 | ||
|---|---|---|
| 3 | EE | Marcello Mura, Luis Gabriel Murillo, Mauro Prevostini: Model-based Design Space Exploration for RTES with SysML and MARTE. FDL 2008: 203-208 |
| 2007 | ||
| 2 | EE | Marcello Mura, Marco Paolieri, Luca Negri, Mariagiovanna Sami: StateCharts to systemc: a high level hardware simulation approach. ACM Great Lakes Symposium on VLSI 2007: 505-508 |
| 1 | EE | Marcello Mura, Marco Paolieri: SC2 StateCharts to SystemC: Automatic Executable Models Generation. FDL 2007: 198-203 |
| 1 | Luis Gabriel Murillo | [3] |
| 2 | Luca Negri | [2] |
| 3 | Marco Paolieri | [1] [2] |
| 4 | Mauro Prevostini | [3] |
| 5 | Mariagiovanna Sami | [2] |