2008 |
11 | EE | Claas Cornelius,
Frank Sill,
Hagen Sämrow,
Jakob Salzmann,
Dirk Timmermann,
Diógenes Cecilio da Silva Jr.:
Encountering gate oxide breakdown with shadow transistors to increase reliability.
SBCCI 2008: 111-116 |
2007 |
10 | EE | Frank Sill,
Jiaixi You,
Dirk Timmermann:
Design of mixed gates for leakage reduction.
ACM Great Lakes Symposium on VLSI 2007: 263-268 |
9 | | Ralf Salomon,
Frank Sill,
Dirk Timmermann:
Minimizing leakage: What if every gate could have its individual threshold voltage?
Artificial Intelligence and Applications 2007: 525-530 |
8 | EE | Ralf Salomon,
Frank Sill:
High-speed, low-leakage integrated circuits: An evolutionary algorithm perspective.
Journal of Systems Architecture 53(5-6): 321-327 (2007) |
2006 |
7 | EE | Ralf Salomon,
Frank Sill:
Biologically-Inspired Optimization of Circuit Performance and Leakage: A Comparative Study.
ARCS 2006: 352-366 |
6 | | Frank Sill,
Claas Cornelius,
Stephan Kubisch,
Dirk Timmermann:
Mixed Gates: Leakage Reduction techniques applied to Switches for Networks-on-Chip.
ReCoSoC 2006: 76-82 |
2005 |
5 | | Danko Schröer,
Hagen Burchardt,
Frank Sill,
Frank Golatowski,
Ralf Salomon,
Dirk Timmermann:
Role-based Strategies at Example of RoboCup.
Artificial Intelligence and Applications 2005: 585-590 |
4 | | Frank Grassert,
Frank Sill,
Claas Cornelius,
Dirk Timmermann:
Verlustleistungsreduzierung bei dynamischen TSPC-Schaltungstechniken.
GI Jahrestagung (1) 2005: 450 |
3 | EE | Frank Sill,
Frank Grassert,
Dirk Timmermann:
Total leakage power optimization with improved mixed gates.
SBCCI 2005: 154-159 |
2 | EE | Frank Sill,
Frank Grassert,
Dirk Timmermann:
Reducing Leakage with Mixed-V_th (MVT).
VLSI Design 2005: 874-877 |
2004 |
1 | EE | Frank Sill,
Frank Grassert,
Dirk Timmermann:
Low power gate-level design with mixed-Vth (MVT) techniques.
SBCCI 2004: 278-282 |