2008 | ||
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2 | EE | Philipp V. Panitz, Markus Olbrich, Erich Barke, Markus Bühler, Jürgen Koehl: Considering possible opens in non-tree topology wire delay calculation. ACM Great Lakes Symposium on VLSI 2008: 17-22 |
2007 | ||
1 | EE | Philipp V. Panitz, Markus Olbrich, Erich Barke, Jürgen Koehl: Robust wiring networks for DfY considering timing constraints. ACM Great Lakes Symposium on VLSI 2007: 43-48 |
1 | Erich Barke | [1] [2] |
2 | Markus Bühler | [2] |
3 | Jürgen Koehl | [1] [2] |
4 | Markus Olbrich | [1] [2] |