ICCAD 1998:
San Jose,
California,
USA
International Conference on Computer-Aided Design,
November 8-12,
1998,
San Jose,
CA,
USA. ACM and IEEE Computer Society,
1998
- Soren Hein, Vijay Nagasamy, Bernhard Rohfleisch, Christoforos E. Kozyrakis, Nikil D. Dutt, Francky Catthoor:
Embedded memories in system design - from technology to systems architecture.
1
Electronic Edition (ACM DL) BibTeX
- Serge Hustin, Miodrag Potkonjak, Eric Verhulst, Wayne Wolf:
Real-time operating systems for embedded computing.
2
Electronic Edition (ACM DL) BibTeX
- Sujit Dey, Jacob A. Abraham, Yervant Zorian:
High-level design validation and test.
3
Electronic Edition (ACM DL) BibTeX
- Phillip Restle, Joel R. Phillips, Ibrahim M. Elfadel:
Interconnect in high speed designs: problems, methodologies and tools.
4
Electronic Edition (ACM DL) BibTeX
- Robert C. Aitken, Jason Cong, Randy Harr, Kenneth L. Shepard, Wayne Wolf:
How will CAD handle billion-transistor systems? (panel).
5
Electronic Edition (ACM DL) BibTeX
- Tong Li, Ching-Han Tsai, Sung-Mo Kang:
Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress.
6-11
Electronic Edition (ACM DL) BibTeX
- Tuyen V. Nguyen, Anirudh Devgan, Ali Sadigh:
Simulation of coupling capacitances using matrix partitioning.
12-18
Electronic Edition (ACM DL) BibTeX
- Tao Lin, Emrah Acar, Lawrence T. Pileggi:
h-gamma: an RC delay metric based on a gamma distribution approximation of the homogeneous response.
19-25
Electronic Edition (ACM DL) BibTeX
- Wilsin Gosti, Amit Narayan, Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli:
Wireplanning in logic synthesis.
26-33
Electronic Edition (ACM DL) BibTeX
- Yao-Wen Chang, Jai-Ming Lin, D. F. Wong:
Graph matching-based algorithms for FPGA segmentation design.
34-39
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Songjie Xu:
Delay-oriented technology mapping for heterogeneous FPGAs with bounded resources.
40-44
Electronic Edition (ACM DL) BibTeX
- Pai H. Chou, Ken Hines, Kurt Partridge, Gaetano Borriello:
Control generation for embedded systems based on composition of modal processes.
46-53
Electronic Edition (ACM DL) BibTeX
- Dirk Ziegenbein, Kai Richter, Rolf Ernst, Jürgen Teich, Lothar Thiele:
Representation of process mode correlation for scheduling.
54-61
Electronic Edition (ACM DL) BibTeX
- Robert P. Dick, Niraj K. Jha:
CORDS: hardware-software co-synthesis of reconfigurable real-time distributed embedded systems.
62-67
Electronic Edition (ACM DL) BibTeX
- Rajesh Pendurkar, Abhijit Chatterjee, Yervant Zorian:
Synthesis of BIST hardware for performance testing of MCM interconnections.
69-73
Electronic Edition (ACM DL) BibTeX
- Kuen-Jong Lee, Jih-Jeen Chen, Cheng-Hua Huang:
Using a single input to support multiple scan chains.
74-78
Electronic Edition (ACM DL) BibTeX
- Frank F. Hsu, Janak H. Patel:
High-level variable selection for partial-scan implementation.
79-84
Electronic Edition (ACM DL) BibTeX
- Qingjian Yu, Janet Meiling Wang, Ernest S. Kuh:
Multipoint moment matching model for multiport distributed interconnect networks.
85-91
Electronic Edition (ACM DL) BibTeX
- Jaijeet S. Roychowdhury:
Reduced-order modelling of linear time-varying systems.
92-95
Electronic Edition (ACM DL) BibTeX
- Joel R. Phillips:
Model reduction of time-varying linear systems using approximate multipoint Krylov-subspace projectors.
96-102
Electronic Edition (ACM DL) BibTeX
- Subarnarekha Sinha, Robert K. Brayton:
Implementation and use of SPFDs in optimizing Boolean networks.
103-110
Electronic Edition (ACM DL) BibTeX
- Shin-ichi Minato, Giovanni De Micheli:
Finding all simple disjunctive decompositions using irredundant sum-of-products forms.
111-117
Electronic Edition (ACM DL) BibTeX
- Yusuke Matsunaga:
On accelerating pattern matching for technology mapping.
118-122
Electronic Edition (ACM DL) BibTeX
- Prashant Saxena, C. L. Liu:
A performance-driven layer assignment algorithm for multiple interconnect trees.
124-127
Electronic Edition (ACM DL) BibTeX
- Avaneendra Gupta, John P. Hayes:
Optimal 2-D cell layout with integrated transistor folding.
128-135
Electronic Edition (ACM DL) BibTeX
- Tzu-Chieh Tien, Hsiao-Pin Su, Yu-Wen Tsay, Yih-Chih Chou, Youn-Long Lin:
Integrating logic retiming and register placement.
136-139
Electronic Edition (ACM DL) BibTeX
- Surendra Bommu, Srimat T. Chakradhar, Kiran B. Doreswamy:
Static compaction using overlapped restoration and segment pruning.
140-146
Electronic Edition (ACM DL) BibTeX
- Vamsi Boppana, W. Kent Fuchs:
Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits.
147-154
Electronic Edition (ACM DL) BibTeX
- Michael S. Hsiao:
A fast, accurate, and non-statistical method for fault coverage estimation.
155-161
Electronic Edition (ACM DL) BibTeX
- Mark M. Gourary, Sergey L. Ulyanov, Michael M. Zharov, Sergey G. Rusakov:
Simulation of high-Q oscillators.
162-169
Electronic Edition (ACM DL) BibTeX
- Alper Demir:
Phase noise in oscillators: DAEs and colored noise sources.
170-177
Electronic Edition (ACM DL) BibTeX
- Sharad Kapur, David E. Long:
High-order Nyström schemes for efficient 3-D capacitance extraction.
178-185
Electronic Edition (ACM DL) BibTeX
- John Lach, William H. Mangione-Smith, Miodrag Potkonjak:
Signature hiding techniques for FPGA intellectual property protection.
186-189
Electronic Edition (ACM DL) BibTeX
- Gang Qu, Miodrag Potkonjak:
Analysis of watermarking techniques for graph coloring problem.
190-193
Electronic Edition (ACM DL) BibTeX
- Darko Kirovski, Yean-Yow Hwang, Miodrag Potkonjak, Jason Cong:
Intellectual property protection by watermarking combinational logic synthesis solutions.
194-198
Electronic Edition (ACM DL) BibTeX
- Jaijeet S. Roychowdhury, Alper Demir:
Estimating noise in RF systems.
199-202
Electronic Edition (ACM DL) BibTeX
- Dennis Sylvester, Kurt Keutzer:
Getting to the bottom of deep submicron.
203-211
Electronic Edition (ACM DL) BibTeX
- Paul D. Gross, Ravishankar Arunachalam, Karthik Rajagopal, Lawrence T. Pileggi:
Determination of worst-case aggressor alignment for delay calculation.
212-219
Electronic Edition (ACM DL) BibTeX
- Andrew R. Conn, Ruud A. Haring, Chandramouli Visweswariah:
Noise considerations in circuit optimization.
220-227
Electronic Edition (ACM DL) BibTeX
- Rajamohana Hegde, Naresh R. Shanbhag:
Energy-efficiency in presence of deep submicron noise.
228-234
Electronic Edition (ACM DL) BibTeX
- Fabrizio Ferrandi, Alberto Macii, Enrico Macii, Massimo Poncino, Riccardo Scarsi, Fabio Somenzi:
Symbolic algorithms for layout-oriented synthesis of pass transistor logic circuits.
235-241
Electronic Edition (ACM DL) BibTeX
- Tyler Thorp, Gin Yee, Carl Sechen:
Domino logic synthesis using complex static gates.
242-247
Electronic Edition (ACM DL) BibTeX
- Min Zhao, Sachin S. Sapatnekar:
Technology mapping for domino logic.
248-251
Electronic Edition (ACM DL) BibTeX
- Fung Yu Young, D. F. Wong:
Slicing floorplans with pre-placed modules.
252-258
Electronic Edition (ACM DL) BibTeX
- Maggie Zhiwei Kang, Wayne Wei-Ming Dai:
Arbitrary rectilinear block packing based on sequence pair.
259-266
Electronic Edition (ACM DL) BibTeX
- Keishi Sakanushi, Shigetoshi Nakatake, Yoji Kajitani:
The multi-BSG: stochastic approach to an optimum packing of convex-rectilinear blocks.
267-274
Electronic Edition (ACM DL) BibTeX
- Ramesh C. Tekumalla, Premachandran R. Menon:
On primitive fault test generation in non-scan sequential circuits.
275-282
Electronic Edition (ACM DL) BibTeX
- Ilker Hamzaoglu, Janak H. Patel:
Test set compaction algorithms for combinational circuits.
283-289
Electronic Edition (ACM DL) BibTeX
- Chauchin Su:
A linear optimal test generation algorithm for interconnect testing.
290-295
Electronic Edition (ACM DL) BibTeX
- Maria del Mar Hershenson, Stephen P. Boyd, Thomas H. Lee:
GPCAD: a tool for CMOS op-amp synthesis.
296-303
Electronic Edition (ACM DL) BibTeX
- Francky Leyn, Georges G. E. Gielen, Willy M. C. Sansen:
An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits.
304-307
Electronic Edition (ACM DL) BibTeX
- Geert Debyser, Georges G. E. Gielen:
Efficient analog circuit synthesis with simultaneous yield and robustness optimization.
308-311
Electronic Edition (ACM DL) BibTeX
- Balakrishnan Iyer, Maciej J. Ciesielski:
Reencoding for cycle-time minimization under fixed encoding length.
312-315
Electronic Edition (ACM DL) BibTeX
- Soha Hassoun, Carl Ebeling:
Using precomputation in architecture and logic resynthesis.
316-323
Electronic Edition (ACM DL) BibTeX
- Jordi Cortadella, Michael Kishinevsky, Alex Kondratyev, Luciano Lavagno, Alexander Taubin, Alexandre Yakovlev:
Lazy transition systems: application to timing optimization of asynchronous circuits.
324-331
Electronic Edition (ACM DL) BibTeX
- Amit Chowdhary, Sudhakar Kale, Phani K. Saripella, Naresh Sehgal, Rajesh K. Gupta:
A general approach for regularity extraction in datapath circuits.
332-339
Electronic Edition (ACM DL) BibTeX
- Luc Séméria, Giovanni De Micheli:
SpC: synthesis of pointers in C: application of pointer analysis to the behavioral synthesis from C.
340-346
Electronic Edition (ACM DL) BibTeX
- Chunho Lee, Miodrag Potkonjak:
A quantitative approach to development and validation of synthetic benchmarks for behavioral synthesis.
347-351
Electronic Edition (ACM DL) BibTeX
- In-Ho Moon, Jae-Young Jang, Gary D. Hachtel, Fabio Somenzi, Jun Yuan, Carl Pixley:
Approximate reachability don't cares for CTL model checking.
351-358
Electronic Edition (ACM DL) BibTeX
- Gila Kamhi, Limor Fix:
Adaptive variable reordering for symbolic model checking.
359-365
Electronic Edition (ACM DL) BibTeX
- Shankar G. Govindaraju, David L. Dill:
Verification by approximate forward and backward reachability.
366-370
Electronic Edition (ACM DL) BibTeX
- Ravindranath Naiknaware, Terri S. Fiez:
CMOS analog circuit stack generation with matching constraints.
371-375
Electronic Edition (ACM DL) BibTeX
- Sam D. Huynh, Seongwon Kim, Mani Soma, Jinyan Zhang:
Testability analysis and multi-frequency ATPG for analog circuits and systems.
376-383
Electronic Edition (ACM DL) BibTeX
- Junwei Hou, Abhijit Chatterjee:
CONCERT: a concurrent transient fault simulator for nonlinear analog circuits.
384-391
Electronic Edition (ACM DL) BibTeX
- Kazuhiro Nakamura, Kazuyoshi Takagi, Shinji Kimura, Katsumasa Watanabe:
Waiting false path analysis of sequential logic circuits for performance optimization.
392-395
Electronic Edition (ACM DL) BibTeX
- Marios C. Papaefthymiou:
Asymptotically efficient retiming under setup and hold constraints.
396-401
Electronic Edition (ACM DL) BibTeX
- Rajeev K. Ranjan, Vigyan Singhal, Fabio Somenzi, Robert K. Brayton:
On the optimization power of retiming and resynthesis transformations.
402-407
Electronic Edition (ACM DL) BibTeX
- Chau-Shen Chen, TingTing Hwang, C. L. Liu:
Architecture driven circuit partitioning.
408-411
Electronic Edition (ACM DL) BibTeX
- Shantanu Tarafdar, Miriam Leeser, Zixin Yin:
Integrating floorplanning in data-transfer based high-level synthesis.
412-417
Electronic Edition (ACM DL) BibTeX
- Shigetoshi Nakatake, Keishi Sakanushi, Yoji Kajitani, Masahiro Kawakita:
The channeled-BSG: a universal floorplan for simultaneous place/route with IC applications.
418-425
Electronic Edition (ACM DL) BibTeX
- Yih-Chih Chou, Youn-Long Lin:
A graph-partitioning-based approach for multi-layer constrained via minimization.
426-429
Electronic Edition (ACM DL) BibTeX
- Yanbing Li, Wayne Wolf:
Hardware/software co-synthesis with memory hierarchies.
430-436
Electronic Edition (ACM DL) BibTeX
- Ross B. Ortega, Gaetano Borriello:
Communication synthesis for distributed embedded systems.
437-444
Electronic Edition (ACM DL) BibTeX
- Kayhan Küçükçakar:
Analysis of emerging core-based design lifecycle.
445-449
Electronic Edition (ACM DL) BibTeX
- Enno Wein:
Core integration: overview and challenges.
450-452
Electronic Edition (ACM DL) BibTeX
- Resve A. Saleh, David Overhauser, Sandy Taylor:
Full-chip verification of UDSM designs.
453-460
Electronic Edition (ACM DL) BibTeX
- Alessandro Bogliolo, Luca Benini:
Node sampling: a robust RTL power modeling approach.
461-467
Electronic Edition (ACM DL) BibTeX
- Zhanping Chen, Kaushik Roy, Edwin K. P. Chong:
Estimation of power sensitivity in sequential circuits with power macromodeling application.
468-472
Electronic Edition (ACM DL) BibTeX
- Ali Pinar, C. L. Liu:
Power invariant vector sequence compaction.
473-476
Electronic Edition (ACM DL) BibTeX
- Steve Haynal, Forrest Brewer:
Efficient encoding for exact symbolic automata-based scheduling.
477-481
Electronic Edition (ACM DL) BibTeX
- Jorge M. Pena, Arlindo L. Oliveira:
A new algorithm for the reduction of incompletely specified finite state machines.
482-489
Electronic Edition (ACM DL) BibTeX
- Qi Wang, Sarma B. K. Vrudhula:
Static power optimization of deep submicron CMOS circuits for dual VT technology.
490-496
Electronic Edition (ACM DL) BibTeX
- Huiqun Liu, D. F. Wong:
Network flow based circuit partitioning for time-multiplexed FPGAs.
497-504
Electronic Edition (ACM DL) BibTeX
- Sverre Wichlund:
On multilevel circuit partitioning.
505-511
Electronic Edition (ACM DL) BibTeX
- Jason Cong, Sung Kyu Lim:
Multiway partitioning with pairwise movement.
512-516
Electronic Edition (ACM DL) BibTeX
- Pranav Ashar, Subhrajit Bhattacharya, Anand Raghunathan, Akira Mukaiyama:
Verification of RTL generated from scheduled behavior in a high-level synthesis flow.
517-524
Electronic Edition (ACM DL) BibTeX
- Darko Kirovski, Miodrag Potkonjak, Lisa M. Guerra:
Functional debugging of systems-on-chip.
525-528
Electronic Edition (ACM DL) BibTeX
- Pei-Hsin Ho, Adrian J. Isles, Timothy Kam:
Formal verification of pipeline control using controlled token nets and abstract interpretation.
529-536
Electronic Edition (ACM DL) BibTeX
- Akio Hirata, Hidetoshi Onodera, Keikichi Tamaru:
Proposal of a timing model for CMOS logic gates driving a CRC load.
537-544
Electronic Edition (ACM DL) BibTeX
- Frederik Beeftink, Prabhakar Kudva, David S. Kung, Leon Stok:
Gate-size selection for standard cell libraries.
545-550
Electronic Edition (ACM DL) BibTeX
- Pasquale Cocchini, Massoud Pedram, Gianluca Piccinini, Maurizio Zamboni:
Fanout optimization under a submicron transistor-level delay model.
551-556
Electronic Edition (ACM DL) BibTeX
- Gagan Hasteer, Anmol Mathur, Prithviraj Banerjee:
Efficient equivalence checking of multi-phase designs using retiming.
557-562
Electronic Edition (ACM DL) BibTeX
- Jerry R. Burch, Vigyan Singhal:
Robust latch mapping for combinational equivalence checking.
563-569
Electronic Edition (ACM DL) BibTeX
- Jerry R. Burch, Vigyan Singhal:
Tight integration of combinational verification methods.
570-576
Electronic Edition (ACM DL) BibTeX
- Srivaths Ravi, Ganesh Lakshminarayana, Niraj K. Jha:
Removal of memory access bottlenecks for scheduling control-flow intensive behavioral descriptions.
577-584
Electronic Edition (ACM DL) BibTeX
- Wim F. J. Verhaegh, Emile H. L. Aarts, Paul C. N. van Gorp:
Period assignment in multidimensional periodic scheduling.
585-592
Electronic Edition (ACM DL) BibTeX
- M. Narasimhan, J. Ramanujam:
Improving the computational performance of ILP-based problems.
593-596
Electronic Edition (ACM DL) BibTeX
- Gang Qu, Miodrag Potkonjak:
Techniques for energy minimization of communication pipelines.
597-600
Electronic Edition (ACM DL) BibTeX
- Sumit Roy, Harm Arts, Prithviraj Banerjee:
PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis.
601-606
Electronic Edition (ACM DL) BibTeX
- Efstathios D. Kyriakis-Bitzaros, Spiridon Nikolaidis, Anna Tatsaki:
Accurate calculation of bit-level transition activity using word-level statistics and entropy function.
607-610
Electronic Edition (ACM DL) BibTeX
- Youxin Gao, D. F. Wong:
Shaping a VLSI wire to minimize delay using transmission line model.
611-616
Electronic Edition (ACM DL) BibTeX
- Chung-Ping Chen, Chris C. N. Chu, D. F. Wong:
Fast and exact simultaneous gate and wire sizing by Lagrangian relaxation.
617-624
Electronic Edition (ACM DL) BibTeX
- Amir H. Salek, Jinan Lou, Massoud Pedram:
A simultaneous routing tree construction and fanout optimization algorithm.
625-630
Electronic Edition (ACM DL) BibTeX
- Jawahar Jain, William Adams, Masahiro Fujita:
Sampling schemes for computing OBDD variable orderings.
631-638
Electronic Edition (ACM DL) BibTeX
- David E. Long:
The design of a cache-friendly BDD library.
639-645
Electronic Edition (ACM DL) BibTeX
- Justin E. Harlow III, Franc Brglez:
Design of experiments in BDD variable ordering: lessons learned.
646-652
Electronic Edition (ACM DL) BibTeX
- Inki Hong, Miodrag Potkonjak, Mani B. Srivastava:
On-line scheduling of hard real-time tasks on variable voltage processor.
653-656
Electronic Edition (ACM DL) BibTeX
- Ganesh Lakshminarayana, Anand Raghunathan, Niraj K. Jha, Sujit Dey:
Transforming control-flow intensive designs to facilitate power management.
657-664
Electronic Edition (ACM DL) BibTeX
- Hoon Choi, Seung Ho Hwang, Chong-Min Kyung, In-Cheol Park:
Synthesis of application specific instructions for embedded DSP software.
665-671
Electronic Edition (ACM DL) BibTeX
- Christoph Scholl, Bernd Becker, Thomas M. Weis:
Word-level decision diagrams, WLCDs and division.
672-677
Electronic Edition (ACM DL) BibTeX
- James Smith, Giovanni De Micheli:
Polynomial methods for component matching and verification.
678-685
Electronic Edition (ACM DL) BibTeX
- Karsten Strehl, Lothar Thiele:
Symbolic model checking of process networks using interval diagram techniques.
686-692
Electronic Edition (ACM DL) BibTeX
- Gaetano Borriello, Luciano Lavagno, Ross B. Ortega:
Interface synthesis: a vertical slice from digital logic to software components.
693-695
Electronic Edition (ACM DL) BibTeX
- Luca Benini, Alessandro Bogliolo, Giovanni De Micheli:
Dynamic power management of electronic systems.
696-702
Electronic Edition (ACM DL) BibTeX
Copyright © Sat May 16 23:16:29 2009
by Michael Ley (ley@uni-trier.de)
