2007 |
17 | EE | Mustafa Parlak,
Ilker Hamzaoglu:
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm.
AHS 2007: 127-133 |
16 | EE | Esra Sahin,
Ilker Hamzaoglu:
Interactive presentation: An efficient hardware architecture for H.264 intra prediction algorithm.
DATE 2007: 183-188 |
15 | EE | Serkan Oktem,
Ilker Hamzaoglu:
An Efficient Hardware Architecture for Quarter-Pixel Accurate H.264 Motion Estimation.
DSD 2007: 444-447 |
14 | EE | Esra Sahin,
Ilker Hamzaoglu:
An Efficient Intra Prediction Hardware Architecture for H.264 Video Decoding.
DSD 2007: 448-454 |
13 | EE | Ilker Hamzaoglu,
Ozgur Tasdizen,
Esra Sahin:
An efficient H.264 intra frame coder system design.
VLSI-SoC 2007: 200-205 |
2006 |
12 | EE | Mustafa Parlak,
Ilker Hamzaoglu:
An Efficient Hardware Architecture for H.264 Adaptive Deblocking Filter.
AHS 2006: 381-385 |
11 | EE | Sinan Yalcin,
Ilker Hamzaoglu:
A High Performance Hardware Architecture for Half-Pixel Accurate H.264 Motion Estimation.
VLSI-SoC 2006: 63-67 |
2005 |
10 | | Sinan Yalcin,
Hasan F. Ates,
Ilker Hamzaoglu:
A High Performance Hardware Architecture for an SAD Reuse based Hierarchical Motion Estimation Algorithm for H.264 Video Coding.
FPL 2005: 509-514 |
2000 |
9 | | Ilker Hamzaoglu,
Janak H. Patel:
Deterministic Test Pattern Generation Techniques for Sequential Circuits.
ICCAD 2000: 538-543 |
8 | EE | Ilker Hamzaoglu,
Janak H. Patel:
Reducing Test Application Time for Built-in-Self-Test Test Pattern Generators.
VTS 2000: 369-376 |
7 | EE | Ilker Hamzaoglu,
Janak H. Patel:
Test set compaction algorithms for combinational circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 19(8): 957-963 (2000) |
1999 |
6 | EE | Ilker Hamzaoglu,
Janak H. Patel:
Reducing Test Application Time for Full Scan Embedded Cores.
FTCS 1999: 260-267 |
5 | EE | Ilker Hamzaoglu,
Janak H. Patel:
New Techniques for Deterministic Test Pattern Generation.
J. Electronic Testing 15(1-2): 63-73 (1999) |
1998 |
4 | EE | Ilker Hamzaoglu,
Janak H. Patel:
Test set compaction algorithms for combinational circuits.
ICCAD 1998: 283-289 |
3 | EE | Ilker Hamzaoglu,
Janak H. Patel:
Compact two-pattern test set generation for combinational and full scan circuits.
ITC 1998: 944-953 |
2 | EE | Ilker Hamzaoglu,
Janak H. Patel:
New Techniques for Deterministic Test Pattern Generation.
VTS 1998: 446-452 |
1997 |
1 | | Hillol Kargupta,
Ilker Hamzaoglu,
Brian Stafford:
Scalable, Distributed Data Mining - An Agent Architecture.
KDD 1997: 211-214 |