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Huiqun Liu

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1999
6EEHuiqun Liu, D. F. Wong: Circuit Partitioning for Dynamically Reconfigurable FPGAs. FPGA 1999: 187-194
5EEHuiqun Liu, D. F. Wong: A graph theoretic optimal algorithm for schedule compression in time-multiplexed FPGA partitioning. ICCAD 1999: 400-405
1998
4EEHuiqun Liu, Kai Zhu, D. F. Wong: Circuit Partitioning with Complex Resource Constraints in FPGAs. FPGA 1998: 77-84
3EEHuiqun Liu, D. F. Wong: Network flow based circuit partitioning for time-multiplexed FPGAs. ICCAD 1998: 497-504
2EEHuiqun Liu, Martin D. F. Wong: Network-flow-based multiway partitioning with area and pin constraints. IEEE Trans. on CAD of Integrated Circuits and Systems 17(1): 50-59 (1998)
1997
1EEHuiqun Liu, D. F. Wong: Network flow based multi-way partitioning with area and pin constraints. ISPD 1997: 12-17

Coauthor Index

1Martin D. F. Wong (D. F. Wong) [1] [2] [3] [4] [5] [6]
2Kai Zhu [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)