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Miriam Leeser

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2009
65 David R. Kaeli, Miriam Leeser: Proceedings of 2nd Workshop on General Purpose Processing on Graphics Processing Units, GPGPU 2009, Washington, DC, USA, March 8, 2009 ACM 2009
64EEPerhaad Mistry, Sherman Braganza, David R. Kaeli, Miriam Leeser: Accelerating phase unwrapping and affine transformations for optical quadrature microscopy using CUDA. GPGPU 2009: 28-37
2008
63EESherman Braganza, Miriam Leeser: An efficient implementation of a phase unwrapping kernel on reconfigurable hardware. ASAP 2008: 138-143
62EEMary Ellen Fuess, Miriam Leeser, Tim Leonard: An FPGA Implementation of Explicit-State Model Checking. FCCM 2008: 119-126
61EESherman Braganza, Miriam Leeser: An Efficient Implementation of a Phase Unwrapping Kernel on Reconfigurable Hardware. FCCM 2008: 316-317
60EEXiaojun Wang, Miriam Leeser: Efficient FPGA implementation of qr decomposition using a systolic array architecture. FPGA 2008: 260
59EEJoshua Noseworthy, Miriam Leeser: Efficient Communication Between the Embedded Processor and the Reconfigurable Logic on an FPGA. IEEE Trans. VLSI Syst. 16(8): 1083-1090 (2008)
58EEDavid R. Kaeli, Miriam Leeser: Special issue: General-purpose processing using graphics processing units. J. Parallel Distrib. Comput. 68(10): 1305-1306 (2008)
57EEDavid R. Kaeli, Miriam Leeser: Acknowledgment to special issue reviewers. J. Parallel Distrib. Comput. 68(10): 1402 (2008)
2007
56EESherman Braganza, Miriam Leeser: The 1D Discrete Cosine Transform For Large Point Sizes Implemented On Reconfigurable Hardware. ASAP 2007: 101-106
55EEXiaojun Wang, Miriam Leeser: K-means Clustering for Multispectral Images Using Floating-Point Divide. FCCM 2007: 151-162
54EENicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King: Writing Portable Applications that Dynamically Bind at Run Time to Reconfigurable Hardware. FCCM 2007: 229-238
53EENicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King: Vforce: An Extensible Framework for Reconfigurable Supercomputing. IEEE Computer 40(3): 39-49 (2007)
2006
52 Joshua Noseworthy, Miriam Leeser: Efficient Use of Communications Between an FPGAs Embedded Processor and its Reconfigurable Logic. ERSA 2006: 191-197
51EEXiaojun Wang, Sherman Braganza, Miriam Leeser: Advanced Components in the Variable Precision Floating-Point Library. FCCM 2006: 249-258
50EEHaiqian Yu, Miriam Leeser: Automatic Sliding Window Operation Optimization for FPGA-Based. FCCM 2006: 76-88
49EEJoshua Noseworthy, Miriam Leeser: Efficient use of communications between an FPGA's embedded processor and its reconfigurable logic. FPGA 2006: 233
48EEBen Cordes, Miriam Leeser, Eric Miller, Richard W. Linderman: Poster reception - Improving the performance of parallel backprojection on a reconfigurable supercomputer. SC 2006: 149
47EEPeter Soderquist, Miriam Leeser, Juan Carlos Rojas: Enabling MPEG-2 video playback in embedded systems through improved data cache efficiency. IEEE Transactions on Multimedia 8(1): 81-89 (2006)
2005
46EEBen Cordes, Jennifer G. Dy, Miriam Leeser, James Goebel: Enabling a RealTime Solution for Neuron Detection with Reconfigurable Hardware (abstract only). FPGA 2005: 264
45EEBen Cordes, Jennifer G. Dy, Miriam Leeser, James Goebel: Enabling a Real-Time Solution for Neuron Detection with Reconfigurable Hardware. IEEE International Workshop on Rapid System Prototyping 2005: 128-134
44EEMiriam Leeser, Srdjan Coric, Eric Miller, Haiqian Yu, Marc Trepanier: Parallel-Beam Backprojection: An FPGA Implementation Optimized for Medical Imaging. VLSI Signal Processing 39(3): 295-311 (2005)
2004
43 Laurie A. Smith King, Miriam Leeser, Heather Quinn: Dynamo: A Runtime Partitioning System. ERSA 2004: 145-154
42EEMiriam Leeser, Shawn Miller, Haiqian Yu: Smart Camera Based on Reconfigurable Hardware Enables Diverse Real-Time Applications. FCCM 2004: 147-155
41EEWang Chen, Panos Kosmas, Miriam Leeser, Carey Rappaport: An FPGA implementation of the two-dimensional finite-difference time-domain (FDTD) algorithm. FPGA 2004: 213-222
2003
40EEJuan Carlos Rojas, Miriam Leeser: Programming portable optimized multimedia applications. ACM Multimedia 2003: 291-294
39EEHeather Quinn, Laurie A. Smith King, Miriam Leeser, Waleed Meleis: Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines. FCCM 2003: 173-
2002
38EESrdjan Coric, Miriam Leeser, Eric Miller, Marc Trepanier: Parallel-beam backprojection: an FPGA implementation optimized for medical imaging. FPGA 2002: 217-226
37EEPavle Belanovic, Miriam Leeser: A Library of Parameterized Floating-Point Modules and Their Use. FPL 2002: 657-666
2001
36EEMike Estlick, Miriam Leeser, James Theiler, John J. Szymanski: Algorithmic transformations in the implementation of K- means clustering on reconfigurable hardware. FPGA 2001: 103-110
35 Laurie A. Smith King, Heather Quinn, Miriam Leeser, Demetris G. Galatopoullos, Elias S. Manolakos: Run-Time Execution of Reconfigurable Hardware in a Java Environment. ICCD 2001: 380-387
34EESilviu M. S. A. Chiricescu, Miriam Leeser, Mankuan Michael Vai: Design and analysis of a dynamically reconfigurable three-dimensional FPGA. IEEE Trans. VLSI Syst. 9(1): 186-196 (2001)
2000
33EEAli M. Shankiti, Miriam Leeser: Implementing a RAKE receiver for wireless communications on an FPGA-based computer system. FPGA 2000: 145-151
32EEYanbing Li, Miriam Leeser: HML, a novel hardware description language and its translation to VHDL. IEEE Trans. VLSI Syst. 8(1): 1-8 (2000)
31EEShantanu Tarafdar, Miriam Leeser: A data-centric approach to high-level synthesis. IEEE Trans. on CAD of Integrated Circuits and Systems 19(11): 1251-1267 (2000)
1998
30EEShantanu Tarafdar, Miriam Leeser: The DT-Model: High-Level Synthesis Using Data Transfers. DAC 1998: 114-117
29EEGoran Doncev, Miriam Leeser, Shantanu Tarafdar: High Level Synthesis for Designing Custom Computing Hardware. FCCM 1998: 326-328
28EEShantanu Tarafdar, Miriam Leeser, Zixin Yin: Integrating floorplanning in data-transfer based high-level synthesis. ICCAD 1998: 412-417
27EEGoran Doncev, Miriam Leeser, Shantanu Tarafdar: Truly Rapid Prototyping Requires High-Level Synthesis. International Workshop on Rapid System Prototyping 1998: 101-
26EEMiriam Leeser, Waleed Meleis, Mankuan Michael Vai, Silviu M. S. A. Chiricescu, Weidong Xu, Paul M. Zavracky: Rothko: A Three-Dimensional FPGA. IEEE Design & Test of Computers 15(1): 16-23 (1998)
1997
25EEPeter Soderquist, Miriam Leeser: Optimizing the Data Cache Performance of a Software MPEG-2 Video Decoder. ACM Multimedia 1997: 291-301
24EEWaleed Meleis, Miriam Leeser, Paul M. Zavracky, Mankuan Michael Vai: Architectural Design of a Three Dimensional FPGA. ARVLSI 1997: 256-269
23 Miriam Leeser, Waleed Meleis, Mankuan Michael Vai, Paul M. Zavracky: Rothko: A three dimensional FPGA architecture, its fabrication, and design tools. FPL 1997: 21-30
22 Peter Soderquist, Miriam Leeser: Memory Traffic and Data Cache Behavior of an MPEG-2 Software Decoder. ICCD 1997: 417-422
1996
21 Peter Soderquist, Miriam Leeser: Area and Performance Tradeoffs in Floating-Point Divide and Square-Root Implementations. ACM Comput. Surv. 28(3): 518-564 (1996)
1995
20EEMiriam Leeser, John W. O'Leary: Verification of a subtractive radix-2 square root algorithm and implementation. ICCD 1995: 526-531
19EEPeter Soderquist, Miriam Leeser: An Area/Performance Comparison of Subtractive and Multiplicative Divide/Square Root Implementations. IEEE Symposium on Computer Arithmetic 1995: 132-139
18 Andrés Takach, Wayne Wolf, Miriam Leeser: An Automaton Model for Scheduling Constraints in Synchronous Machines. IEEE Trans. Computers 44(1): 1-12 (1995)
17EEMark Aagaard, Miriam Leeser: Verifying a Logic-Synthesis Algorithm and Implementation: A Case Study in Software Verification. IEEE Trans. Software Eng. 21(10): 822-833 (1995)
1994
16EEMark H. Linderman, Miriam Leeser: Simulation of digital circuits in the presence of uncertainty. ICCAD 1994: 248-251
15 Mark Aagaard, Miriam Leeser: Reasoning About Pipelines with Structural Hazards. TPCD 1994: 13-32
14 John W. O'Leary, Miriam Leeser, Jason Hickey, Mark Aagaard: Non-Restoring Integer Square Root: A Case Study in Design by Principled Optimization. TPCD 1994: 52-71
13 Mark Aagaard, Miriam Leeser: A Methodology for Efficient Hardware Verification. Formal Methods in System Design 5(1/2): 95-117 (1994)
12EEMark Aagaard, Miriam Leeser: PBS: proven Boolean simplification. IEEE Trans. on CAD of Integrated Circuits and Systems 13(4): 459-470 (1994)
1993
11 John W. O'Leary, Mark H. Linderman, Miriam Leeser, Mark Aagaard: HML: A Hardware Description Language Based on Standard ML. CHDL 1993: 327-334
10 Mark Aagaard, Miriam Leeser, Phillip J. Windley: Toward a Super Duper Hardware Tactic. HUG 1993: 399-412
9 Mark Aagaard, Miriam Leeser: A Framework for Specifying and Designing Pipelines. ICCD 1993: 548-551
8EEMiriam Leeser, Richard Chapman, Mark Aagaard, Mark H. Linderman, Stephan Meier: High level synthesis and generating FPGAs with the BEDROC system. VLSI Signal Processing 6(2): 191-214 (1993)
7EEMiriam Leeser: High level synthesis and generation FPGAs with the BEDROC system. VLSI Signal Processing 6(3): 7 (1993)
1992
6 Mark Aagaard, Miriam Leeser: Verifying a Logic Synthesis Tool in Nuprl: A Case Study in Software Verification. CAV 1992: 69-81
5 Mark Aagaard, Miriam Leeser: A Methodology for Reusable Hardware Proofs. TPHOLs 1992: 177-196
1991
4 Mark Aagaard, Miriam Leeser: A Formally Verified System for Logic Synthesis. ICCD 1991: 346-350
1990
3 Miriam Leeser, Geoffrey Brown: Hardware Specification, Verification and Synthesis: Mathematical Aspects, Mathematical Science Institute Workshop, Cornall University, Ithaca, New York, USA, July 5-7, 1989, Proceedings Springer 1990
1989
2 Geoffrey M. Brown, Miriam Leeser: From Programs to Transistors: Verifying Hardware Synthesis Tools. Hardware Specification, Verification and Synthesis 1989: 129-151
1EEMiriam Leeser: Reasoning about the function and timing of integrated circuits with interval temporal logic. IEEE Trans. on CAD of Integrated Circuits and Systems 8(12): 1233-1246 (1989)

Coauthor Index

1Mark Aagaard [4] [5] [6] [8] [9] [10] [11] [12] [13] [14] [15] [17]
2Pavle Belanovic [37]
3Sherman Braganza [51] [56] [61] [63] [64]
4Geoffrey Brown [3]
5Geoffrey M. Brown [2]
6Richard Chapman [8]
7Wang Chen [41]
8Silviu M. S. A. Chiricescu [26] [34]
9Albert Conti [53] [54]
10Ben Cordes [45] [46] [48]
11Srdjan Coric [38] [44]
12Goran Doncev [27] [29]
13Jennifer G. Dy [45] [46]
14Mike Estlick [36]
15Mary Ellen Fuess [62]
16Demetris G. Galatopoullos [35]
17James Goebel [45] [46]
18Jason Hickey [14]
19David R. Kaeli [57] [58] [64] [65]
20Laurie A. Smith King [35] [39] [43] [53] [54]
21Panos Kosmas [41]
22Tim Leonard [62]
23Yanbing Li [32]
24Mark H. Linderman [8] [11] [16]
25Richard W. Linderman [48]
26Elias S. Manolakos [35]
27Stephan Meier [8]
28Waleed Meleis [23] [24] [26] [39]
29Eric Miller [38] [44] [48]
30Shawn Miller [42]
31Perhaad Mistry [64]
32Nicholas Moore [53] [54]
33Joshua Noseworthy [49] [52] [59]
34John W. O'Leary [11] [14] [20]
35Heather Quinn [35] [39] [43]
36Carey Rappaport [41]
37Juan Carlos Rojas [40] [47]
38Ali M. Shankiti [33]
39Peter Soderquist [19] [21] [22] [25] [47]
40John J. Szymanski [36]
41Andrés Takach [18]
42Shantanu Tarafdar [27] [28] [29] [30] [31]
43James Theiler [36]
44Marc Trepanier [38] [44]
45Mankuan Michael Vai [23] [24] [26] [34]
46Xiaojun Wang [51] [55] [60]
47Phillip J. Windley [10]
48Wayne Wolf [18]
49Weidong Xu [26]
50Zixin Yin [28]
51Haiqian Yu [42] [44] [50]
52Paul M. Zavracky [23] [24] [26]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)